MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 934
MCBSTM32EXL
Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Specifications of MCBSTM32EXL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Ethernet (ETH): media access control (MAC) with DMA controller
934/995
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bits 31:0 TPD: Transmit poll demand
Bits 31:0 RPD: Receive poll demand
Ethernet DMA transmit poll demand register (ETH_DMATPDR)
Address offset: 0x1004
Reset value: 0x0000 0000
This register is used by the application to instruct the DMA to poll the transmit descriptor list.
The transmit poll demand register enables the Transmit DMA to check whether or not the
current descriptor is owned by DMA. The Transmit Poll Demand command is given to wake
up the TxDMA if it is in Suspend mode. The TxDMA can go into Suspend mode due to an
underflow error in a transmitted frame or due to the unavailability of descriptors owned by
transmit DMA. You can issue this command anytime and the TxDMA resets it once it starts
re-fetching the current descriptor from host memory.
EHERNET DMA receive poll demand register (ETH_DMARPDR)
Address offset: 0x1008
Reset value: 0x0000 0000
This register is used by the application to instruct the DMA to poll the receive descriptor list.
The Receive poll demand register enables the receive DMA to check for new descriptors.
This command is given to wake up the RxDMA from Suspend state. The RxDMA can go into
Suspend state only due to the unavailability of descriptors owned by it.
When these bits are written with any value, the DMA reads the current descriptor pointed to by
the ETH_DMACHTDR register. If that descriptor is not available (owned by Host), transmission
returns to the Suspend state and ETH_DMASR register bit 2 is asserted. If the descriptor is
available, transmission resumes.
When these bits are written with any value, the DMA reads the current descriptor pointed to by
the ETH_DMACHRDR register. If that descriptor is not available (owned by Host), reception
returns to the Suspended state and ETH_DMASR register bit 7 is not asserted. If the
descriptor is available, the Receive DMA returns to active state.
Doc ID 13902 Rev 9
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RM0008
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