AS1154BSOU austriamicrosystems, AS1154BSOU Datasheet - Page 10

• Manufacturer Part Number: AS1154BSOU
• Description: IC, LVDS DRIVER, 1.267NS, SOIC-8
• Manufacturer: austriamicrosystems

Specifications of AS1154BSOU

• Device Type: Line
• Supply Current Max: 12mA
• Peak-to-peak Jitter Max: 900ps
• Signaling Rate: 800Mbps
• Signal Input Type: LVCMOS, LVTTL
• Output Level Type: LVDS
• Supply Voltage Range: 3V To 3.6V
• Esd Hbm: 4kV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AS1156/AS1154
Data Sheet - A p p l i c a t i o n s
9 Applications
Table 5. Function Table
Figure 19. Typical Application Circuit
Power-Supply Bypassing
To bypass V
device as possible, with the smaller valued capacitor closest to pin V
Differential Traces
Input trace characteristics can adversely affect the performance of the AS1156/AS1154.
Cables and Connectors
Supported transmission media include printed circuit board traces, backplanes, and cables.
www.austriamicrosystems.com
0.8V < V
Use controlled-impedance PC board traces to match the cable characteristic impedance. The termination resistor is
Eliminate reflections and ensure that noise couples as common mode by running the differential traces near each
Reduce skew by using matched trace lengths. Tight skew control is required to minimize emissions and proper data
Route each channel’s differential signals very close to each other for optimal cancellation of their respective exter-
Avoid 90° turns (use two 45° turns).
Minimize the number of vias to further prevent impedance irregularities.
Use cables and connectors with matched differential impedance (typically 100Ω) to minimize impedance mis-
Balanced cables such as twisted pair offer superior signal quality and tend to generate less EMI due to magnetic
Avoid the use of unbalanced cables such as ribbon cable or simple coaxial cable.
also matched to this characteristic impedance.
other.
recovery of the devices.
nal magnetic fields. Use a constant distance between the differential traces to avoid irregularities in differential
impedance.
matches.
field canceling effects. Balanced cables pick up noise as common mode, which is rejected by the LVDS receiver.
Input
INx
H
L
INx
CC
< 2.0V
LVTTL/LVCMOS
, use high-frequency surface-mount ceramic 0.1µF and 0.001µF capacitors in parallel as close to the
Data Inputs
Undetermined
OUTx+
H
L
+3.3V
Tx
0.001µF
AS1156
100Ω Shielded Twisted Cable or Microstrip PC Board Traces
Output
0.1µF
Undetermined
Revision 1.01
OUTx-
Signals
LVDS
H
L
107Ω
CC
Single LVDS Receiver
.
+3.3V
AS1158
0.001µF
Rx
0.1µF
LVTTL/LVCMOS
Data Outputs
10 - 15