DSPIC33FJ128MC804-E/ML Microchip Technology, DSPIC33FJ128MC804-E/ML Datasheet - Page 290
![IC, DSC, 16BIT, 128KB 40MHZ, 3.6V, QFN44](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC33FJ128MC804-E/ML
Manufacturer Part Number
DSPIC33FJ128MC804-E/ML
Description
IC, DSC, 16BIT, 128KB 40MHZ, 3.6V, QFN44
Manufacturer
Microchip Technology
Series
DsPIC33Fr
Datasheets
1.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
2.DSPIC33FJ32MC302-ISO.pdf
(436 pages)
3.DSPIC33FJ64MC202-ESO.pdf
(424 pages)
Specifications of DSPIC33FJ128MC804-E/ML
Core Frequency
40MHz
Core Supply Voltage
3.6V
No. Of I/o's
35
Flash Memory Size
128KB
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +125°C
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 9x10b/12b, D/A 6x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- DSPIC33FJ32MC202-IMM PDF datasheet
- DSPIC33FJ32MC302-ISO PDF datasheet #2
- DSPIC33FJ64MC202-ESO PDF datasheet #3
- Current page: 290 of 424
- Download datasheet (6Mb)
REGISTER 23-2:
DS70291D-page 290
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4-3
bit 2
bit 1
bit 0
R/W-0
R/W-0
ROEN
LOEN
LOEN: Left Channel DAC output enable
1 = Positive and negative DAC outputs are enabled
0 = DAC outputs are disabled
Unimplemented: Read as ‘0’
LMVOEN: Left Channel Midpoint DAC output voltage enable
1 = Midpoint DAC output is enabled
0 = Midpoint output is disabled
Unimplemented: Read as ‘0’
LITYPE: Left Channel Type of Interrupt
1 = Interrupt if FIFO is EMPTY
0 = Interrupt if FIFO is NOT FULL
LFULL: Status, Left Channel Data input FIFO is FULL
1 = FIFO is Full
0 = FIFO is not Full
LEMPTY: Status, Left Channel Data input FIFO is EMPTY
1 = FIFO is Empty
0 = FIFO is not Empty
ROEN: Right Channel DAC output enable
1 = Positive and negative DAC outputs are enabled
0 = DAC outputs are disabled
Unimplemented: Read as ‘0’
RMVOEN: Right Channel Midpoint DAC output voltage enable
1 = Midpoint DAC output is enabled
0 = Midpoint output is disabled
Unimplemented: Read as ‘0’
RITYPE: Right Channel Type of Interrupt
1 = Interrupt if FIFO is EMPTY
0 = Interrupt if FIFO is NOT FULL
RFULL: Status, Right Channel Data input FIFO is FULL
1 = FIFO is Full
0 = FIFO is not Full
REMPTY: Status, Right Channel Data input FIFO is EMPTY
1 = FIFO is Empty
0 = FIFO is not Empty
U-0
U-0
—
—
DAC1STAT: DAC STATUS REGISTER
W = Writable bit
‘1’ = Bit is set
RMVOEN
LMVOEN
R/W-0
R/W-0
U-0
U-0
Preliminary
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
RITYPE
LITYPE
R/W-0
R/W-0
© 2009 Microchip Technology Inc.
x = Bit is unknown
RFULL
LFULL
R-0
R-0
REMPTY
LEMPTY
R-0
R-0
bit 8
bit 0
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