DSPIC33FJ32MC204-E/PT Microchip Technology, DSPIC33FJ32MC204-E/PT Datasheet - Page 153
![IC, DSC, 16BIT, 32KB 40MHZ, 3.6V, TQFP44](/photos/6/82/68251/c04-076_pt_sml.jpg)
DSPIC33FJ32MC204-E/PT
Manufacturer Part Number
DSPIC33FJ32MC204-E/PT
Description
IC, DSC, 16BIT, 32KB 40MHZ, 3.6V, TQFP44
Manufacturer
Microchip Technology
Series
DsPIC33Fr
Datasheets
1.DSPIC33FJ32MC202-IMM.pdf
(320 pages)
2.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
3.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
4.DSPIC33FJ32MC204-IPT.pdf
(304 pages)
Specifications of DSPIC33FJ32MC204-E/PT
Core Frequency
40MHz
Core Supply Voltage
3.6V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
35
Flash Memory Size
32KB
Supply Voltage Range
3V To 3.6V
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 9x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Package
44TQFP
Device Core
dsPIC
Family Name
dSPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
35
Interface Type
I2C/SPI/UART
On-chip Adc
9-chx10-bit|9-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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- DSPIC33FJ32MC202-IMM PDF datasheet
- DSPIC33FJ32MC202-IMM PDF datasheet #2
- DSPIC33FJ32MC202-IMM PDF datasheet #3
- DSPIC33FJ32MC204-IPT PDF datasheet #4
- Current page: 153 of 320
- Download datasheet (5Mb)
13.0
The input capture module is useful in applications
requiring frequency (period) and pulse measurement.
The dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
devices support up to eight input capture channels.
The input capture module captures the 16-bit value of
the selected Time Base register when an event occurs
at the ICx pin. The events that cause a capture event
are listed below in three categories:
FIGURE 13-1:
© 2011 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
Note: An ‘x’ in a signal, register or bit name denotes the number of the capture channel.
ICx Pin
2: Some registers and associated bits
INPUT CAPTURE
of the dsPIC33FJ32MC202/204 and
dsPIC33FJ16MC304 family of devices. It
is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section 12. “Input Capture” (DS70198)
of the “dsPIC33F/PIC24H Family Refer-
ence Manual”, which is available from the
Microchip website (www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
Prescaler
(1, 4, 16)
Counter
3
INPUT CAPTURE BLOCK DIAGRAM
System Bus
ICxCON
ICM<2:0> (ICxCON<2:0>)
ICOV, ICBNE (ICxCON<4:3>)
Mode Select
Edge Detection Logic
Clock Synchronizer
ICxI<1:0>
and
in
(in IFSn Register)
Set Flag ICxIF
Interrupt
Logic
1.
2.
3.
Each input capture channel can select one of two
16-bit timers (Timer2 or Timer3) for the time base.
The selected timer can use either an internal or
external clock.
Other operational features include:
• Device wake-up from capture pin during CPU
• Interrupt on input capture event
• 4-word FIFO buffer for capture values
• Use of input capture to provide additional sources
- Capture timer value on every falling edge of
- Capture timer value on every rising edge of
- Capture timer value on every 4th rising edge
- Capture timer value on every 16th rising
Sleep and Idle modes
- Interrupt optionally generated after 1, 2, 3 or
of external interrupts
Simple Capture Event modes:
input at ICx pin
input at ICx pin
Capture timer value on every edge (rising and
falling).
Prescaler Capture Event modes:
of input at ICx pin
edge of input at ICx pin
4 buffer locations are filled
FIFO
Logic
R/W
From 16-bit Timers
TMR2 TMR3
1
ICxBUF
16
0
DS70283H-page 153
16
ICTMR
(ICxCON<7>)
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