NTE2532 NTE ELECTRONICS, NTE2532 Datasheet - Page 3
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NTE2532
Manufacturer Part Number
NTE2532
Description
IC, EPROM, 32KBIT, 300NS, DIP-24
Manufacturer
NTE ELECTRONICS
Datasheet
1.NTE2532.pdf
(4 pages)
Specifications of NTE2532
Memory Type
EPROM - OTP
Memory Size
32Kbit
Memory Configuration
32K X 8
Access Time
300ns
Supply Voltage Range
4.75V To 5.25V
Memory Case Style
DIP
No. Of Pins
24
Recommended Timing Requirement for Programming: (T
Note 8. Timing measurement reference levels: inputs 0.8V and 2V, outputs 0.65V and 2.2V.
Note10. Typical values are at nominal voltages.
Operation:
Read/Out Disable
When the outputs of two or more NTE2532s are connected on the same bus, the output of any particular
device in the circuit can be read with no interference from the cpmpeting outputs of the other devices.
The device whose output is to be read should have a low–level TTL signal applied to the PD/PGM pin.
Output data is accessed at pins Q1 through Q8.
Power Down
Active power dissipation can be cut by over 70% by applying a high TTL signal to the PD/PGM pin.
In this mode all outputs are in a high–impedance state.
Erasure
Before programming, the NTE2532 is erased by exposing the chip through the transparent lid to high–
intensity ultraviolet light having a wavelength of 253.7nm (2537 angstroms). The recommended mini-
mum exposure dose (UV intensity time exposure time) is fifteen watt–seconds per square centimeter.
Thus, a typical 12 miliwatt per square centimeter filterless UV lamp will erase the device in a minimum
of 21 minutes. The lamp should be located about 2.5 centimeters (1 inch) above the chip during era-
sure. After erasure, all bits are in the “1” state (assuming high–level output corresponds to logic “1”).
It should be noted that normal ambient light contains the correct wavelenght for erasure. Therefore
when using the NTE2532, th window should be covered with an opaque label.
Start Programming
After erasure (all bits in logic “1” state), logic “0’s” are programmed into the desited locations. A “0”
can be erasedonly by ultraviolet light. The programming mode is achieved when V
presented in parallel (8 bits) on pins Q1 through Q8. Once addresses and data are stable, a 10–milli-
second TTL low–level pulse should be applied the the PGM pin at each address location to be pro-
grammed. Maximum pulse width is 44 milliseconds. Locations can be programmed in any order. Sev-
eral NTE2532s can be programmed simultaneously when the devices are connected in parallel.
PD/PGM (20)
V
V
Q (9 to 11, 13 to 17)
Pulse Duration, Program Pulse
Rise Time, Program Pulse
Fall Time, Program Pulse
Address Setup Time
Data Setup Time
Setup Time for V
Address Hold Time
Data Hold Time
Program Pulse Hold Time
V
PP
CC
PP
Function (Pins)
(21)
Hold Time
(24)
Parameter
PP
Read
+5V
+5V
V
Q
IL
Output Disable
High–Z
+5V
+5V
V
IH
Symbol
t
t
su(VPP)
t
t
h(VPP)
t
t
t
t
w(PR)
t
t
h(PR)
r(PR)
su(A)
su(D)
f(PR)
h(D)
h(A)
Power Down
High–Z
+5V
+5V
V
IH
Test Conditions
Mode
Start Programming Inhibit Programming
A
Pulsed V
= +25 C, Note 8, Note 10)
+25V
+5V
D
IH
to V
IL
Min
9
5
5
2
2
0
2
2
0
2
Typ
PP
–
–
–
–
–
–
–
–
–
–
is 25V. Data is
High–Z
+25V
+5V
V
Max
IH
–
–
–
–
–
–
–
–
–
–
Unit
ms
ns
ns
ns
ns
s
s
s
s
s