A29040BL-70F AMIC, A29040BL-70F Datasheet - Page 8

• Manufacturer Part Number: A29040BL-70F
• Description: IC, SM, FLASH, 4MB, 5V
• Manufacturer: AMIC

Specifications of A29040BL-70F

• Memory Size: 4Mbit
• Supply Voltage Range: 4.5V To 5.5V
• Memory Case Style: PLCC
• No. Of Pins: 32
• Access Time: 70ns
• Interface: Parallel
• Logic Function Number: 29040
• Memory Configuration: 512K X
• Package / Case: PLCC
• Memory Type: Uniform Sector Flash
• Operating Temperature Range: 0°C To +70°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

system may once again read array data with the same
exception. See "Erase Suspend/Erase Resume Commands"
for more information on this mode.
The system must issue the reset command to re-enable the
device for reading array data if I/O
autoselect mode. See the "Reset Command" section, next.
See also "Requirements for Reading Array Data" in the
"Device Bus Operations" section for more information. The
Read Operations table provides the read parameters, and
Read Operation Timings diagram shows the timing diagram.
Reset Command
Writing the reset command to the device resets the device to
reading array data. Address bits are don't care for this
command. The reset command may be written between the
sequence cycles in an erase command sequence before
erasing begins. This resets the device to reading array data.
Once erasure begins, however, the device ignores reset
commands until the operation is complete.
The reset command may be written between the sequence
cycles
programming begins. This resets the device to reading array
data (also applies to programming in Erase Suspend mode).
Once programming begins, however, the device ignores
reset commands until the operation is complete.
The reset command may be written between the sequence
cycles in an autoselect command sequence. Once in the
autoselect mode, the reset command must be written to
return to reading array data (also applies to autoselect
during Erase Suspend).
If I/O
the reset command returns the device to reading array data
(also applies during Erase Suspend).
Autoselect Command Sequence
The autoselect command sequence allows the host system
to access the manufacturer and devices codes, and
determine whether or not a sector is protected. The
Command Definitions table shows the address and data
requirements. This method is an alternative to that shown in
the Autoselect Codes (High Voltage Method) table, which is
intended for PROM programmers and requires V
address bit A9.
The autoselect command sequence is initiated by writing two
unlock cycles, followed by the autoselect command. The
device then enters the autoselect mode, and the system
may read at any address any number of times, without
initiating another command sequence.
A read cycle at address XX00h retrieves the manufacturer
code and another read cycle at XX03h retrieves the
continuation code. A read cycle at address XX01h returns
the device code. A read cycle containing a sector address
(SA) and the address 02h in returns 01h if that sector is
protected, or 00h if it is unprotected. Refer to the Sector
Address tables for valid sector addresses.
The system must write the reset command to exit the
autoselect mode and return to reading array data.
Byte Program Command Sequence
Programming is a four-bus-cycle operation. The program
command sequence is initiated by writing two unlock write
cycles, followed by the program set-up command. The
program address and data are written next, which in turn
initiate the Embedded Program algorithm. The system is not
(January, 2007, Version 1.0)
5
goes high during a program or erase operation, writing
in
a
program
command
5
goes high, or while in the
sequence
before
ID
on
7
required to provide further controls or timings. The device
automatically provides internally generated program pulses
and verify the programmed cell margin. The Command
Definitions table shows the address and data requirements
for the byte program command sequence.
When the Embedded Program algorithm is complete, the
device then returns to reading array data and addresses are
no longer latched. The system can determine the status of
the program operation by using I/O
Operation Status" for information on these status bits.
Any commands written to the device during the Embedded
Program Algorithm are ignored. Programming is allowed in
any sequence and across sector boundaries. A bit cannot be
programmed from a "0" back to a "1 ". Attempting to do so
may halt the operation and set I/O
successful. However, a succeeding read will show that the
data is still "0". Only erase operations can convert a "0" to a
"1".
Data
Note : See the appropriate Command Definitions table for
Increment Address
Polling algorithm to indicate the operation was
program command sequence.
algorithm in
Embedded
Program
progress
Figure 1. Program Operation
AMIC Technology, Corp.
Last Address ?
Write Program
Programming
Verify Data ?
from System
Completed
Command
Sequence
Data Poll
A29040B Series
START
5
7
to "1", or cause the
or I/O
Yes
Yes
6
. See "Write
No