IDT71V416S12PHG INTEGRATED DEVICE TECHNOLOGY, IDT71V416S12PHG Datasheet - Page 7

• Manufacturer Part Number: IDT71V416S12PHG
• Description: SRAM, ASYCH, 4M, 256KX16, TSOP44
• Manufacturer: INTEGRATED DEVICE TECHNOLOGY

Specifications of IDT71V416S12PHG

• Memory Size: 4Mbit
• Access Time: 12ns
• Supply Voltage Range: 3V To 3.6V
• Memory Case Style: TSOP
• No. Of Pins: 44
• Operating Temperature Range: 0°C To +70°C
• Operating Temperature Max: +70°C
• Operating: RoHS Compliant
• Memory Configuration: 256K X 16
• Rohs Compliant: Yes

Timing Waveform of Write Cycle No. 2 (CS Controlled Timing)
Timing Waveform of Write Cycle No. 3
(BHE, BLE Controlled Timing)
NOTES:
1. A write occurs during the overlap of a LOW CS, LOW BHE or BLE, and a LOW WE.
2. During this period, I/O pins are in the output state, and input signals must not be applied.
3. If the CS LOW or BHE and BLE LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in a high-impedance state.
IDT71V416S, IDT71V416L, 3.3V CMOS Static RAM
4 Meg (256K x 16-Bit)
DATA
ADDRESS
ADDRESS
DATA
BHE, BLE
BHE, BLE
DATA
DATA
OUT
WE
OUT
WE
CS
CS
IN
IN
t
AS
t
AS
(1,3)
t
t
AW
AW
t
CW
t
t
WP
WP
(2)
t
t
t
WC
BW
WC
6.42
7
t
CW
(2)
t
BW
DATA
t
t
DATA
DW
DW
IN
IN
Commercial and Industrial Temperature Ranges
VALID
VALID
t
t
DH
DH
t
t
WR
WR
(1,3)
3624 drw 09
3624 drw 10