PIC16LF874A-I/PT Microchip Technology, PIC16LF874A-I/PT Datasheet - Page 197

IC, 8BIT MCU, PIC16LF, 20MHZ, TQFP-44

PIC16LF874A-I/PT

Manufacturer Part Number
PIC16LF874A-I/PT
Description
IC, 8BIT MCU, PIC16LF, 20MHZ, TQFP-44
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets

Specifications of PIC16LF874A-I/PT

Controller Family/series
PIC16LF
No. Of I/o's
33
Eeprom Memory Size
128Byte
Ram Memory Size
192Byte
Cpu Speed
20MHz
No. Of Timers
3
Core Size
8 Bit
Program Memory Size
4 Kwords
Core Processor
PIC
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
FIGURE 17-19:
TABLE 17-15: A/D CONVERSION REQUIREMENTS
 2003 Microchip Technology Inc.
130
131
132
134
Note 1:
Param
No.
A/D DATA
Note: If the A/D clock source is selected as RC, a time of T
SAMPLE
A/D CLK
2:
ADRES
T
T
T
T
*
§
Symbol
BSF ADCON0, GO
AD
CNV
ACQ
GO
ADIF
These parameters are characterized but not tested.
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
This specification ensured by design.
ADRES register may be read on the following T
See Section 11.1 “A/D Acquisition Requirements” for minimum conditions.
GO
Q4
instruction to be executed.
A/D Clock Period
Conversion Time (not including S/H time)
(Note 1)
Acquisition Time
Q4 to A/D Clock Start
132
A/D CONVERSION TIMING
Characteristic
(T
OSC
/2)
9
(1)
PIC16F87XA
PIC16LF87XA
PIC16F87XA
PIC16LF87XA
8
OLD_DATA
7
CY
Sampling Stopped
(Note 2)
cycle.
Min
10*
1.6
3.0
2.0
3.0
CY
is added before the A/D clock starts. This allows the SLEEP
130
131
T
OSC
Typ†
4.0
6.0
40
/2 §
2
Max
6.0
9.0
12
1
Units
T
AD
s
s
s
s
s
s
PIC16F87XA
1 T
0
CY
T
T
A/D RC mode
A/D RC mode
The minimum time is the
amplifier settling time. This may
be used if the “new” input volt-
age has not changed by more
than 1 LSb (i.e., 20.0 mV @
5.12V) from the last sampled
voltage (as stated on C
If the A/D clock source is
selected as RC, a time of T
added before the A/D clock
starts. This allows the SLEEP
instruction to be executed.
OSC
OSC
based, V
based, V
NEW_DATA
DONE
Conditions
DS39582B-page 195
REF
REF
3.0V
2.0V
HOLD
CY
).
is

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