PIC24FJ128GB210-I/BG Microchip Technology, PIC24FJ128GB210-I/BG Datasheet - Page 285

• Manufacturer Part Number: PIC24FJ128GB210-I/BG
• Description: IC, 16BIT MCU, PIC24F, 32MHZ, BGA-121
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ128GB210-I/BG

• Controller Family/series: PIC24
• No. Of I/o's: 84
• Ram Memory Size: 96KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• No. Of Pwm Channels: 9
• Core Size: 16 Bit
• Program Memory Size: 128KB
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 121-TFBGA
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 96 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 44
• Number Of Timers: 5
• Operating Supply Voltage: 2.2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM240001, MA240021
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

REGISTER 20-3:
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13-10
bit 9-8
bit 7-0
R/W-0, HSC
ALRMEN
ARPT7
R/W-0
ALRMEN: Alarm Enable bit
1 = Alarm is enabled (cleared automatically after an alarm event whenever ARPT<7:0> = 00h and
0 = Alarm is disabled
CHIME: Chime Enable bit
1 = Chime is enabled; ARPT<7:0> bits are allowed to roll over from 00h to FFh
0 = Chime is disabled; ARPT<7:0> bits stop once they reach 00h
AMASK<3:0>: Alarm Mask Configuration bits
11xx = Reserved – do not use
101x = Reserved – do not use
1001 = Once a year (except when configured for February 29
1000 = Once a month
0111 = Once a week
0110 = Once a day
0101 = Every hour
0100 = Every 10 minutes
0011 = Every minute
0010 = Every 10 seconds
0001 = Every second
0000 = Every half second
ALRMPTR<1:0>: Alarm Value Register Window Pointer bits
Points to the corresponding Alarm Value registers when reading the ALRMVALH and ALRMVALL registers.
The ALRMPTR<1:0> value decrements on every read or write of ALRMVALH until it reaches ‘00’.
ALRMVAL<15:8>:
11 = Unimplemented
10 = ALRMMNTH
01 = ALRMWD
00 = ALRMMIN
ALRMVAL<7:0>:
11 = Unimplemented
10 = ALRMDAY
01 = ALRMHR
00 = ALRMSEC
ARPT<7:0>: Alarm Repeat Counter Value bits
11111111 = Alarm will repeat 255 more times
...
00000000 = Alarm will not repeat
The counter decrements on any alarm event. The counter is prevented from rolling over from 00h to FFh
unless CHIME = 1.
R/W-0, HSC
CHIME
ARPT6
R/W-0
CHIME = 0)
ALCFGRPT: ALARM CONFIGURATION REGISTER
HSC = Hardware Settable/Clearable bit
W = Writable bit
‘1’ = Bit is set
R/W-0, HSC
AMASK3
ARPT5
R/W-0
R/W-0, HSC
PIC24FJ256GB210 FAMILY
AMASK2
ARPT4
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0, HSC
AMASK1
ARPT3
R/W-0
R/W-0, HSC
AMASK0
ARPT2
R/W-0
th
, once every 4 years)
x = Bit is unknown
R/W-0, HSC
R/W-0, HSC
ALRMPTR1
ARPT1
DS39975A-page 285
R/W-0, HSC
R/W-0, HSC
ALRMPTR0
ARPT0
bit 8
bit 0