P87C51FA-4N NXP Semiconductors, P87C51FA-4N Datasheet - Page 30

IC, 8BIT MCU, 80C51, 16MHZ, DIP-40

P87C51FA-4N

Manufacturer Part Number
P87C51FA-4N
Description
IC, 8BIT MCU, 80C51, 16MHZ, DIP-40
Manufacturer
NXP Semiconductors
Datasheets

Specifications of P87C51FA-4N

Controller Family/series
80C51
No. Of I/o's
32
Ram Memory Size
256Byte
Cpu Speed
16MHz
No. Of Timers
4
No. Of Pwm Channels
5
Core Size
8 Bit
Program Memory Size
8KB
Package
40PDIP
Device Core
80C51
Family Name
87C
Maximum Speed
16 MHz
Ram Size
256 Byte
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Program Memory Type
EPROM
Number Of Programmable I/os
32
Interface Type
UART
Operating Temperature
0 to 70 °C
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P87C51FA-4N
Manufacturer:
XICOR
Quantity:
101
1. ‘0’ = Valid low for that pin, ‘1’ = valid high for that pin.
2. V
3. V
*
1. P – programmed. U – unprogrammed.
2. Any other combination of the security bits is not defined.
Philips Semiconductors
Table 8. EPROM Programming Modes
NOTES:
Table 9. Program Security Bits for EPROM Devices
NOTES:
2000 Jan 20
Read signature
Program code data
Verify code data
Pgm encryption table
Pgm security bit 1
Pgm security bit 2
Pgm security bit 3
80C51 8-bit microcontroller family
4K/128 OTP/ROM/ROMless, low voltage (2.7V–5.5V),
low power, high speed (33 MHz)
ALE/PROG receives 5 programming pulses for code data (also for user array; 5 pulses for encryption or security bits) while V
12.75V. Each programming pulse is low for 100 s ( 10 s) and high for a minimum of 10 s.
1
2
3
4
PP
CC
PROGRAM LOCK BITS
= 12.75V 0.25V.
= 5V 10% during programming and verification.
SB1
U
P
P
P
MODE
SB2
U
U
P
P
1, 2
SB3
U
U
U
P
RST
PROTECTION DESCRIPTION
No Program Security features enabled. (Code verify will still be encrypted by the Encryption Array if
programmed.)
MOVC instructions executed from external program memory are disabled from fetching code bytes
from internal memory, EA is sampled and latched on Reset, and further programming of the EPROM
is disabled.
Same as 2, also verify is disabled.
Same as 3, external execution is disabled. Internal data RAM is not accessible.
1
1
1
1
1
1
1
PSEN
0
0
0
0
0
0
0
Back
ALE/PROG
0*
0*
0*
0*
0*
1
1
30
Next
EA/V
V
V
V
V
V
1
PP
1
PP
PP
PP
PP
PP
P2.7
0
1
0
1
1
1
0
80C51/87C51/80C31
P2.6
0
0
0
0
1
1
1
P3.7
Product specification
0
1
1
1
1
0
0
PP
is held at
P3.6
0
1
1
0
1
0
1

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