AT80C51RD2-SLSUM Atmel, AT80C51RD2-SLSUM Datasheet - Page 31

MCU, 8BIT, 8051, 5V, SPI, 20MHZ, 44PLCC

AT80C51RD2-SLSUM

Manufacturer Part Number
AT80C51RD2-SLSUM
Description
MCU, 8BIT, 8051, 5V, SPI, 20MHZ, 44PLCC
Manufacturer
Atmel
Datasheets

Specifications of AT80C51RD2-SLSUM

Controller Family/series
(8051) 8052
No. Of I/o's
32
Ram Memory Size
1280Byte
Cpu Speed
40MHz
No. Of Timers
3
No. Of Pwm Channels
5
Core Size
8bit
Oscillator Type
External Only
Processor Series
AT80x
Core
8051
Data Bus Width
8 bit
Program Memory Type
ROMLess
Data Ram Size
1280 B
Interface Type
UART, SPI
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
PLCC
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Cpu Family
AT80
Device Core
8051
Device Core Size
8b
Frequency (max)
40MHz
Program Memory Size
Not Required
Total Internal Ram Size
1.25KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT80C51RD2-SLSUM
Manufacturer:
Atmel
Quantity:
1 445
Part Number:
AT80C51RD2-SLSUM
Manufacturer:
Atmel
Quantity:
10 000
Figure 10-4. PCA Compare Mode and PCA Watchdog Timer
10.3
4113D–8051–01/09
CCAPnH
High-speed Output Mode
Write t o
1
CCAPnL
Write to
0
Reset
Before enabling ECOM bit, CCAPnL and CCAPnH should be set with a non zero value, other-
wise an unwanted match could happen. Writing to CCAPnH will set the ECOM bit.
Once ECOM set, writing CCAPnL will clear ECOM so that an unwanted match doesn’t occur
while modifying the compare value. Writing to CCAPnH will set ECOM. For this reason, user
software should write CCAPnL first, and then CCAPnH. Of course, the ECOM bit can still be
controlled by accessing to CCAPMn register.
In this mode, the CEX output (on port 1) associated with the PCA module will toggle each time a
match occurs between the PCA counter and the module's capture registers. To activate this
mode the TOG, MAT, and ECOM bits in the module's CCAPMn SFR must be set (see
Figure 10-5).
A prior write must be done to CCAPnL and CCAPnH before writing the ECOMn bit.
Enable
CCAPnH
CH
PCA counter/timer
16 bit comparator
CIDL
CF
ECOMn
WDTE
CCAPnL
CR
CL
CAPPn
Match
CAPNn MATn TOGn PWMn ECCFn
CCF4
CCF3
CCF2 CCF1 CCF0
CPS1 CPS0
ECF
CCON
0xD8
CCAPMn, n = 0 to 4
0xDA to 0xDE
CMOD
0xD9
AT80C51RD2
PCA IT
RESET *
31

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