LPC2212FBD144 NXP Semiconductors, LPC2212FBD144 Datasheet - Page 15

16/32BIT MCU ARM7, 128K FLASH, 144LQFP

LPC2212FBD144

Manufacturer Part Number
LPC2212FBD144
Description
16/32BIT MCU ARM7, 128K FLASH, 144LQFP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC2212FBD144

No. Of I/o's
112
Ram Memory Size
16KB
Cpu Speed
60MHz
No. Of Timers
2
No. Of Pwm Channels
6
Digital Ic Case
RoHS Compliant
Core Size
32bit
Program Memory Size
128KB
Oscillator Type
External Only
Controller Family/series
LPC22xx
Rohs Compliant
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC2212FBD144,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
LPC2212FBD144/01,5
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
LPC2212_2214_4
Product data sheet
6.5.1 Interrupt sources
Vectored IRQs have the middle priority. Sixteen of the interrupt requests can be assigned
to this category. Any of the interrupt requests can be assigned to any of the 16 vectored
IRQ slots, among which slot 0 has the highest priority and slot 15 has the lowest.
Non-vectored IRQs have the lowest priority.
The VIC combines the requests from all the vectored and non-vectored IRQs to produce
the IRQ signal to the ARM processor. The IRQ service routine can start by reading a
register from the VIC and jumping there. If any of the vectored IRQs are requesting, the
VIC provides the address of the highest-priority requesting IRQs service routine,
otherwise it provides the address of a default routine that is shared by all the non-vectored
IRQs. The default routine can read another VIC register to see what IRQs are active.
Table 4
one interrupt line connected to the Vectored Interrupt Controller, but may have several
internal interrupt flags. Individual interrupt flags may also represent more than one
interrupt source.
Table 4.
Block
WDT
-
ARM Core
ARM Core
Timer 0
Timer 1
UART0
UART1
PWM0
I
SPI0
SPI1 and SSP
PLL
RTC
System Control
ADC
2
C-bus
lists the interrupt sources for each peripheral function. Each peripheral device has
Interrupt sources
[1]
Flag(s)
Watchdog Interrupt (WDINT)
Reserved for software interrupts only
EmbeddedICE, DbgCommRx
EmbeddedICE, DbgCommTx
Match 0 to 3 (MR0, MR1, MR2, MR3)
Match 0 to 3 (MR0, MR1, MR2, MR3)
Rx Line Status (RLS)
Transmit Holding Register empty (THRE)
Rx Data Available (RDA)
Character Time-out Indicator (CTI)
Rx Line Status (RLS)
Transmit Holding Register empty (THRE)
Rx Data Available (RDA)
Character Time-out Indicator (CTI)
Modem Status Interrupt (MSI)
Match 0 to 6 (MR0, MR1, MR2, MR3, MR4, MR5, MR6)
SI (state change)
SPIF, MODF
SPIF, MODF and TXRIS, RXRIS, RTRIS, RORRIS
PLL Lock (PLOCK)
RTCCIF (Counter Increment), RTCALF (Alarm)
External Interrupt 0 (EINT0)
External Interrupt 1 (EINT1)
External Interrupt 2 (EINT2)
External Interrupt 3 (EINT3)
ADC
Rev. 04 — 3 January 2008
16/32-bit ARM microcontrollers
LPC2212/2214
© NXP B.V. 2008. All rights reserved.
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