ECOG1X14Z5 CYAN, ECOG1X14Z5 Datasheet - Page 60

• Manufacturer Part Number: ECOG1X14Z5
• Description: IC, 16BIT MCU, ECOG1X, 70MHZ, BGA-208
• Manufacturer: CYAN

Specifications of ECOG1X14Z5

• Controller Family/series: ECOG1X
• No. Of I/o's: 120
• Ram Memory Size: 24KB
• Cpu Speed: 70MHz
• No. Of Timers: 14
• No. Of Pwm Channels: 8
• Core Size: 16 Bit
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Version 1.15
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60
Symbol
T
t
t
t
t
t
t
Pmin
t
OE
OD
t
OE
OD
t
OE
OD
Digital Inputs and Outputs
The input pulse width specification applies to any input signal which is sampled by a peripheral of the
chip. All inputs are clocked through synchroniser circuits to eliminate metastable data when reading
input registers.
Output signal rise and fall times depend on the external load on each signal and the drive current
capability of the output. Rise times are to 70% of VDD and fall times to 30% of VDD.
t
t
t
The following pins have 2mA output drive capability:
eICE_LOADB/JTMS, eICE_MISO/JTDO, nReset_Out.
The following pins have 2mA output drive capability and selectable internal pull-up resistors:
PortA_0-7, PortB_5-7, PortR_0-7, PortS_0-7, PortT_0-3.
The following pins have 2mA output drive capability, selectable internal pull-up resistors, and are 5V tolerant:
PortB_0-4, PortK_0-3, PortL_0-3, PortN_0-7, PortP_0-7, PortQ_0-7. The outputs must be disabled (tristated) or
used in open-drain mode when signals above VDD are present on these pins.
The following pins have 4mA output drive capability:
PortC_0-3, PortD_0-3, PortE_0-7, PortF_0-3, PortG_0-3, PortH_0-7, PortI_0-7, PortJ_0-3, PortM_0-7.
R
R
R
F
F
F
Parameter
Inputs
Minimum pulse width
2mA Outputs
Output rise time
Output fall time
Output enable time
Output disable time
2mA 5V Tolerant Outputs
Output rise time
Output fall time
Output enable time
Output disable time
4mA Outputs
Output rise time
Output fall time
Output enable time
Output disable time
eCOG and CyanIDE are registered trademarks of Cyan Holdings plc
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eCOG1X Microcontroller Product Family
Table 28: AC characteristics - digital I/O
3
Conditions
Peripheral sample clock period is T
determined by peripheral clock and
prescaler configuration.
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
www.cyantechnology.com
= 8pF
= 16pF
= 32pF
= 64pF
= 8pF
= 16pF
= 32pF
= 64pF
= 8pF
= 16pF
= 32pF
= 64pF
= 8pF
= 16pF
= 32pF
= 64pF
= 8pF
= 16pF
= 32pF
= 64pF
= 8pF
= 16pF
= 32pF
= 64pF
S
,
Min
3T
S
Typ
0.6
0.6
0.6
0.6
1.0
1.0
Max
4 August 2009
1.4
2.1
3.5
6.4
1.1
1.7
2.7
4.9
0.9
0.9
1.7
2.6
4.5
8.2
1.3
2.0
3.5
6.4
0.9
0.9
1.1
1.5
2.2
3.6
1.0
1.3
1.8
2.9
1.5
1.5
Units
sec
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns