ADSP-21161NKCAZ100 Analog Devices Inc, ADSP-21161NKCAZ100 Datasheet - Page 8

• Manufacturer Part Number: ADSP-21161NKCAZ100
• Description: IC,DSP,32-BIT,CMOS,BGA,225PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Fixed/Floating Pointr

Specifications of ADSP-21161NKCAZ100

• Rohs Compliant: YES
• Interface: Host Interface, Link Port, Serial Port
• Clock Rate: 100MHz
• Non-volatile Memory: External
• On-chip Ram: 128kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.80V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 225-MBGA, 225-Mini-BGA
• Device Core Size: 32b
• Architecture: Enhanced Harvard
• Format: Floating Point
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 128KB
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (min): 1.71/3.13V
• Operating Supply Voltage (max): 1.89/3.47V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: CSPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADSP21161NKCAZ100

ADSP-21161N
setup and message registers. DMA setup via a host would allow
it to access any internal memory address via DMA transfers.
Vector interrupt support provides efficient execution of host
commands.
CLOCK
RESET
3
2
1
Figure 5. Shared Memory Multiprocessing System
CLKIN
RESET
ID2-0
CLKIN
RESET
ID2-0
CLKIN
RESET
ID2-0
Rev. B | Page 8 of 60 | November 2009
ADSP-21161N #4
ADSP-21161N #3
ADSP-21161N #2
ADSP-21161N #1
DATA47-16
DATA47-16
DATA47-16
CONTROL
CONTROL
ADDR23-0
ADDR23-0
ADDR23-0
SDCLK1-0
SDCKE
SDA10
MS3-0
BR6-2
SDWE
REDY
SBTS
BMS
HBG
DQM
ACK
HBR
RAS
CAS
BR1
WR
RD
CS
The host processor interface can be used in either multiproces-
sor or single processor SHARC systems. For multiprocessor
systems, host access to the SHARC requires address pins
ADDR17, ADDR18, ADDR19, and ADDR20 to be driven low.
It is not enough to tie these pins to ground through a resistor
ADDR
DATA
ADDR
DATA
OE
WE
ACK
CS
DATA
RAS
CAS
DQM
WE
CLK
CKE
DATA
CS
ADDR
A10
CS
ADDR
PERIPHERALS
(OPTIONAL)
PROCESSOR
(OPTIONAL)
INTERFACE
(OPTIONAL)
MEMORY
(OPTIONAL)
GLOBAL
EPROM
AND
SDRAM
HOST
BOOT