SAK-C164CI-8E25M Infineon Technologies, SAK-C164CI-8E25M Datasheet - Page 14

IC, 16BIT MCU, 64K OTP, MQFP80, 164

SAK-C164CI-8E25M

Manufacturer Part Number
SAK-C164CI-8E25M
Description
IC, 16BIT MCU, 64K OTP, MQFP80, 164
Manufacturer
Infineon Technologies
Datasheet

Specifications of SAK-C164CI-8E25M

Core Size
16bit
No. Of I/o's
59
Program Memory Size
64KB
Ram Memory Size
4KB
Cpu Speed
25MHz
Oscillator Type
External Only
No. Of Timers
5
Digital Ic Case Style
MQFP
Supply Voltage
RoHS Compliant
Controller Family/series
C164CI
Peripherals
ADC
Rohs Compliant
Yes

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Interrupt System
With an interrupt response time within a range from just 250 ns to 600 ns (in case of internal
program execution), the C164CI is capable of reacting very fast to the occurrence of non-
deterministic events.
The architecture of the C164CI supports several mechanisms for fast and flexible response to
service requests that can be generated from various sources internal or external to the
microcontroller. Any of these interrupt requests can be programmed to being serviced by the
Interrupt Controller or by the Peripheral Event Controller (PEC).
In contrast to a standard interrupt service where the current program execution is suspended and
a branch to the interrupt vector table is performed, just one cycle is ‘stolen’ from the current CPU
activity to perform a PEC service. A PEC service implies a single byte or word data transfer between
any two memory locations with an additional increment of either the PEC source or the destination
pointer. An individual PEC transfer counter is implicity decremented for each PEC service except
when performing in the continuous transfer mode. When this counter reaches zero, a standard
interrupt is performed to the corresponding source related vector location. PEC services are very
well suited, for example, for supporting the transmission or reception of blocks of data. The C164CI
has 8 PEC channels each of which offers such fast interrupt-driven data transfer capabilities.
A separate control register which contains an interrupt request flag, an interrupt enable flag and an
interrupt priority bitfield exists for each of the possible interrupt sources. Via its related register, each
source can be programmed to one of sixteen interrupt priority levels. Once having been accepted
by the CPU, an interrupt service can only be interrupted by a higher prioritized service request. For
the standard interrupt processing, each of the possible interrupt sources has a dedicated vector
location.
Fast external interrupt inputs are provided to service external interrupts with high precision
requirements. These fast interrupt inputs feature programmable edge detection (rising edge, falling
edge or both edges).
Software interrupts are supported by means of the ‘TRAP’ instruction in combination with an
individual trap (interrupt) number.
The following table shows all of the possible C164CI interrupt sources and the corresponding
hardware-related interrupt flags, vectors, vector locations and trap (interrupt) numbers:
Source of Interrupt or PEC
Service Request
Fast External Interrupt 0
Fast External Interrupt 1
Fast External Interrupt 2
Fast External Interrupt 3
GPT1 Timer 2
GPT1 Timer 3
Semiconductor Group
Request
Flag
CC8IR
CC9IR
CC10IE
CC11IE
T2IR
T3IR
CC8IE
Enable
Flag
CC9IE
CC10IE
CC11IE
T2IE
T3IE
14
CC8INT
Interrupt
Vector
CC9INT
CC10INT
CC11INT
T2INT
T3INT
Vector
Location
00’0060
00’0064
00’0068
00’006C
00’0088
00’008C
H
H
H
H
H
H
Trap
Number
18
19
1A
1B
22
23
C164CI
1998-02
H
H
H
H
H
H

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