CDB4364 Cirrus Logic Inc, CDB4364 Datasheet - Page 21

• Manufacturer Part Number: CDB4364
• Description: Eval Bd 6Chn DAC W/DSD Spt&Lw-Ltnc DF
• Manufacturer: Cirrus Logic Inc

Specifications of CDB4364

• Number Of Dac's: 6
• Number Of Bits: 24
• Outputs And Type: 6, Single Ended
• Sampling Rate (per Second): 192k
• Data Interface: Serial
• Dac Type: Voltage
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: CS4364
• Description/function: Audio D/A
• Operating Supply Voltage: 5 V
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: CS4364
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant, Contains lead / RoHS non-compliant

DS619F1
4.2
M4
(DIF1)
0
0
0
0
1
1
1
M1
M2
0
0
1
1
0
0
0
0
1
1
1
1
In Hardware Mode, operation is determined by the Mode Select pins. The states of these pins are continu-
ally scanned for any changes; however, the mode should only be changed while the device is in reset
(RST pin low) to ensure proper switching from one mode to another. These pins require connection to sup-
ply or ground as outlined in
Tables 4
In Software Mode, the operational mode and data format are set in the FM and DIF registers. See
Control (Address 03h)” on page
Mode Select
M3
0
0
1
1
0
0
1
(DIF0)
(DEM)
-
M0
M1
0
1
0
1
M2
6
0
0
1
1
0
0
1
1
0
1
0
1
0
1
show the decode of these pins.
Table 6
Left Justified, up to 24-bit data
I
Right Justified, 16-bit Data
Right Justified, 24-bit Data
M1
2
Table 4. PCM Digital Interface Format, Hardware Mode Options
Table 6. Direct Stream Digital (DSD), Hardware Mode Options
S, up to 24-bit data
Table 4
M0
0
1
0
1
0
1
0
1
Table 5. Mode Selection, Hardware Mode Options
M0
Figure
64x oversampled DSD data with a 4x MCLK to DSD data rate
64x oversampled DSD data with a 6x MCLK to DSD data rate
64x oversampled DSD data with a 8x MCLK to DSD data rate
64x oversampled DSD data with a 12x MCLK to DSD data rate
128x oversampled DSD data with a 2x MCLK to DSD data rate
128x oversampled DSD data with a 3x MCLK to DSD data rate
128x oversampled DSD data with a 4x MCLK to DSD data rate
128x oversampled DSD data with a 6x MCLK to DSD data rate
Single-Speed without De-Emphasis (4 kHz to 50 kHz sample rates)
Single-Speed with 44.1 kHz De-Emphasis; see
Double-Speed (50 kHz to 100 kHz sample rates)
Quad-Speed (100 kHz to 200 kHz sample rates)
Auto Speed-Mode Detect (32 kHz to 200 kHz sample rates)
Auto Speed-Mode Detect with 44.1 kHz De-Emphasis; see
DSD Processor Mode
34.
7. For M0, M1, and M2, supply is VLC. For M3 and M4, supply is VLS.
DESCRIPTION
DESCRIPTION
DESCRIPTION
FORMAT
Figure 16
0
1
2
3
Figure 16
FIGURE
CS4364
10
11
8
9
“PCM
21