CS4373A-ISZ Cirrus Logic Inc, CS4373A-ISZ Datasheet
CS4373A-ISZ
Specifications of CS4373A-ISZ
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CS4373A-ISZ Summary of contents
Page 1
... AC test modes measure system dynamic performance through THD and CMRR tests while DC test modes are for gain calibration and pulse tests. The CS4373A is driven by a ∆Σ digital bit stream from the differential CS5376A digital filter test bit stream (TBS) generator ...
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... Power Supply Bypassing ................................................................................................. 28 9.2 PCB Layers and Routing ................................................................................................. 28 9.3 Power Supply Rejection ................................................................................................... 28 9.4 SCR Latch-up .................................................................................................................. 29 9.5 DC-DC Converters .......................................................................................................... 29 10. TERMINOLOGY .................................................................................................................... 30 11. PIN DESCRIPTION ............................................................................................................... 31 12. PACKAGE DIMENSIONS ..................................................................................................... 33 13. ORDERING INFORMATION ................................................................................................ 34 14. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION .......................... 34 15. REVISION HISTORY ........................................................................................................... 34 2 .......................................................................................................... 17 CS4373A TABLE OF CONTENTS DS699F2 ...
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... Figure 1. Digital Input Rise and Fall Times ................................................................................... 12 Figure 2. System Timing Diagram................................................................................................. 14 Figure 3. MCLK / MSYNC Timing Detail ....................................................................................... 14 Figure 4. CS4373A Block Diagram ............................................................................................... 16 Figure 6. Connection Diagram ...................................................................................................... 17 Figure 5. System Diagram ............................................................................................................ 17 Figure 7. Power Mode Diagram .................................................................................................... 18 Figure 8. AC Differential Modes .................................................................................................... 19 Figure 9. AC Common Mode ........................................................................................................ 20 Figure 10. DC Test Modes ............................................................................................................ 21 Figure 11 ...
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... Figure 6 on page 17, unless otherwise noted. Symbol ± 2% VA+ ± (Note 1) 2% VA- ± (Note 2, 3) VREF (Note 4) VREF- Industrial (-IS, -ISZ Selection CS4373A Specified Operating Conditions. A Min Nom Max 2.45 2.50 2.55 -2.45 -2.50 -2.55 3.20 3.30 3.40 - 2.500 - - - Attenuation ATT[2:0] Attenuation 1 ...
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... Negative Analog VA- Digital VD (VA+) - (VA-) VA DIFF (VD) - (VA-) VD DIFF (Note (Note (Note 5) I OUT PDN V INA V IND ± 100 mA will not cause SCR latch-up. CS4373A Min Typ Max Unit -40 - +85 ºC -65 - 150 º 125 º º Min Max Parameter -0.5 6.8 V -6.8 0 ...
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... LBUF Load Capacitance C LBUF 1/1 - 1/64 ZDIF BUF 1/1 - 1/32 ZSE BUF (Note 9) (BUF-) 1/64 (Note 9) (BUF+) 1/64 (Note 8) HZ BUF XT (Note 8) BUF ± outputs is normally from the CS3301A / CS3302A amplifiers, which have CS4373A Min Typ Max Unit - 2.500 - µ µ µ ...
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... VAC - BW (Note 8, 10) VAC - IMP 1/1 VAC - 0.5 ABS VAC - 0.2 1/2 REL - 1/4 - 1/8 - 1/16 - 1/32 - 1/64 (Note 14) VAC - TC (Note 13) VAC - CM (Note 13, 14) VAC - CMTC CS4373A Typ Max Unit 2 1. 625 - mV pp 312 156. 78.125 - 100 Hz - -20 dBfs - 0.2 0.2 %FS ± ...
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... THD BUFL 1/2 -> 2x 1/4 -> 4x 1/8 -> 8x 1/16 -> 16x 1/32 -> 32x 1/64 -> 64x ± ) include 1/f noise not present on the precision outputs (OUT CS4373A Min Typ Max Unit - 114 - dB - 114 - dB - 114 - dB - 113 ...
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... N - 1/1 -> 1x BUF - 1/2 -> 1/4 -> 1/8 -> 1/16 -> 16x - 1/32 -> 32x - 1/64 -> 64x CS4373A Typ Max Unit - V (VA-)+2.35 µV/°C 300 - ± µ rms µ rms µ rms µ rms µ rms µV ...
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... OUT - 1/2 -> 1/4 -> 1/8 -> 1/16 -> 16x - 1/32 -> 32x - 1/64 -> 64x N - 1/1 -> 1x BUF - 1/2 -> 1/4 -> 1/8 -> 1/16 -> 16x - 1/32 -> 32x - 1/64 -> 64x CS4373A Typ Max Unit 2 1. 625 - mV 312 156. 78.125 - mV 39.0625 - mV - 0.4 0.2 %FS ± 0.1 0.2 % ± 0 -0.1 ± 0 -0.2 ± ...
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... VCM - CMM VCM - CMM 1/1 VAC - ABS 1/2 VAC - REL 1/4 - 1/8 - 1/16 - 1/32 - (Note 14) VCM - TC (Note 21) VCM - CM (Note 14, 21) VCM - CMTC ) + (SIG )] / 2. max min CS4373A Typ Max Unit 2 1. 625 - mV pp 312 156. 78.125 - 100 Hz - -20 dBfs -115 -105 dB -95 - ...
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... Figure 1. Digital Input Rise and Fall Times 12 Symbol Min (Note 22) V 0.6*VD IH (Note 22 (Note (Note RISE (Note FALL (Note 23 tdata (Note 8) INR 25 OD (Note 24) TBS - FS (Note 24) TBS - -20dB t rise t fall CS4373A Typ Max Unit - 0.8 V µ 100 ns - 100 ns 256 - kbits 0x04B8F2 - 0x0078E5 - 0 0 DS699F2 ...
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... CLK (Note 25 mclk (Note 8) MCLK 40 DC (Note RISE (Note FALL (Note 8) MCLK - IBJ (Note 8) MCLK - OBJ (Note 8, 26 mss (Note 8, 26 msync (Note 8, 26 msh (Note 8, 27 tdata CS4373A Typ Max Unit 2.048 - MHz 488 - 300 122 - ns 976 - ns 122 - ns 1220 - ns 13 ...
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... DIGITAL CHARACTERISTICS (CONT.) SYNC MCLK (2.048 MHz) MSYNC t 0 TDATA (256 kHz) MCLK (2.048 MHz) t mss MSYNC TDATA (256 kHz) 14 Figure 2. System Timing Diagram t t msh mclk msync t tdata Figure 3. MCLK / MSYNC Timing Detail CS4373A DS699F2 ...
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... Power supply rejection is characterized by applying a 100 mVp-p 50-Hz sine wave to each supply. DS699F2 Symbol Min (Note 28 (Note 28 (Note 28 (Note 28 (Note 28 (Note 28 (Note 28 (Note 28 (Note 28 (Note 28 (Note (Note 29) PSRR - CS4373A Typ Max Unit µ 2 µ 4 µ µA 200 - µA 260 - µ µ µ ...
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... CS5371A / CS5372A ∆Σ modulators, and the CS5376A digital filter. 2.1 Digital Inputs The CS4373A is driven by a ∆Σ digital bit stream from the CS5376A digital filter test bit stream (TBS) generator. The digital filter also provides clock and sync signals as well as GPIO control signals to set the operational mode and attenuation ...
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... CS4373A System Telem etry µController or Configuration EEPROM CS5376A Digital Filter Com m unication Interface CS4373A Test DAC VD 0.1µF VA- VD MCLK MCLK MSYNC MSYNC TDATA TBSDATA CS4373A GPIO MODE0 GPIO MODE1 MODE2 GPIO GPIO ATT0 ATT1 GPIO ATT2 GPIO VA- DGND CS5376A SIGNALS 17 ...
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... POWER MODES The CS4373A has four power modes. AC test modes and DC test modes are operational modes, while the power down and sleep modes are non-operational, standby modes. 4.1 Power Down If MCLK is stopped, an internal loss-of-clock detection circuit automatically places the CS4373A into power down. Power down is in- ...
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... OUT+ OUT- CS4373A MODE 3 BUF+ BUF- Figure 8. AC Differential Modes Differential AC signals out of the CS4373A consist of two halves with equal but opposite magnitude, varying about a common mode voltage. A full-scale 5 V differential AC sig- PP nal centered on a -0.15 V common mode volt- age will have: SIG ...
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... To recover stability, place the CS4373A into power down or sleep mode and restart the CS5376A test bit stream gener ator before placing the CS4373A back into an AC test mode. 5.3 DC Test Modes DC test modes create precision level-shifted and buffered versions of the voltage reference input as precision DC common mode and DC differential analog outputs ...
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... If a pulse test requires pre- Approx cise timing control, an external controller -0. Common should directly toggle the MODE pins of the Mode CS4373A to avoid delays associated with writ- ing to the CS5376A digital filter GPIO regis- ters. Approx -0. Sensor impedance can be measured using Common ...
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... ELECTRONICS CH1,2,3,4 OUT VA+ VA- 6. DIGITAL INPUTS The CS4373A is designed to operate with the CS5376A digital filter. The digital filter gener- ates one-bit ∆Σ test bit stream data (TDATA), a master clock (MCLK) and a synchronization signal (MSYNC). In addition, the digital filter GPIO pins control the CS4373A operational mode (MODE) and attenuator (ATT) settings ...
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... If precise timing control of operational modes is required (for example, switching between DC modes for pulse generation), an external controller should directly toggle the MODE pins of the CS4373A to avoid the delay asso- ciated with writing to the CS5376A digital filter GPCFG registers. CS4373A with the ...
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... SIG+ and SIG- in the above example would read 1.767 V 7.2 Analog Output Attenuation The CS4373A has seven analog output atten- uation settings from 1/1 to 1/64 selected with the ATT2, ATT1, and ATT0 pins. At 1/64 atten- uation in AC Common Mode (MODE 6) there is no output signal amplitude due to the atten- uator architecture ...
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... CAP± Analog Output The CS4373A requires C0G or NPO- type capacitor connected differentially across the CAP± pins. This capacitor creates an inter- nal anti-alias filter to eliminate high-frequency signals from the OUT± ...
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... Regulator 100 µF To VA- Regulator 100 µF 8. VOLTAGE REFERENCE The CS4373A requires a 2.500 V precision voltage reference to be supplied to the VREF pins. 8.1 VREF Power Supply To guarantee proper regulation headroom for the voltage reference device, the voltage refer- ence GND pin should be connected to VA- in- ...
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... Gain drift specifications of the CS4373A do not include the tempera- ture drift effects of external passive compo- While nents or of the voltage reference device itself. ...
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... Power Supply Rejection Power supply rejection of the CS4373A is fre- quency dependent. The CS5376A digital filter rejects power supply noise for frequencies above the selected digital filter corner frequen- cy ...
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... Power Supply Characteristics 9.4 SCR Latch-up The VA- pin is tied to the CS4373A CMOS substrate and must always be the most-nega- tive voltage applied to the device to ensure SCR latch-up does not occur. In general, latch-up may occur when any pin voltage ex- ceeds the ...
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... Common Mode Drift - The variation in the measured common mode voltage across the specified temperature range rms magnitude of full scale signal rms magnitude of noise floor ( sum of the powers of the harmonic frequencies power of the fundamental frequency measured full scale voltage - theoretical full scale voltage theoretical full scale voltage CS4373A ( ( ( | •100 •100% DS699F2 ...
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... MSYNC DNC DNC Pin Description CS4373A System Ground Mode Select Mode Select Mode Select Attenuation Range Select Attenuation Range Select Attenuation Range Select Signal Bitstream Input Positive Digital Power Supply System Ground Master Clock Input Master Sync Input Do Not Connect Do Not Connect ...
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... Pin Description Attenuation ATT[2:0] Attenuation 1 1/2 -6. 1/4 -12. 1/8 -18. 1/16 -24. 1/32 -30. 1/64 -36. reserved reserved MODE[2:0] Mode Description Sleep mode OUT and BUF outputs OUT only, BUF tri-state BUF only, OUT tri-state common mode output differential output common mode output Sleep mode. CS4373A DS699F2 ...
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... JEDEC #: MO-150 Controlling Dimension is Millimeters CS4373A 1 E1 ∝ END VIEW L MILLIMETERS NOM MAX -- -- 2.13 0.15 0.25 1.75 1.88 -- 0.38 10.20 10.50 7.80 8 ...
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... INFORMATION Model CS4373A-ISZ (lead free) 14.ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION Model Number CS4373A-ISZ (lead free) * MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020. 15.REVISION HISTORY Revision Date PP1 MAR 2003 Preliminary release for CS4373. PP2 SEP 2005 Update for new CS4373A features and most-current characterization data. ...