CS4397-KS Cirrus Logic Inc, CS4397-KS Datasheet - Page 23

• Manufacturer Part Number: CS4397-KS
• Description: D/A Converter (D-A) IC
• Manufacturer: Cirrus Logic Inc

Specifications of CS4397-KS

• No. Of Pins: 28
• Mounting Type: Surface Mount
• Peak Reflow Compatible (260 C): No
• Supply Voltage Max: 5.25V
• No. Of Bits: 24 Bit
• Leaded Process Compatible: No
• Interface Type: Serial
• Package / Case: 28-SOIC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

5.0 PIN DESCRIPTION - DSD MODE
Master Clock - MCLK
CLKMODE
DSD Serial Clock - DSD_SCLK
Audio Data - DSD_L and DSD_R
DS333PP1
Sampling Ratio
Refer to PCM mode
Refer to PCM mode
Refer to PCM mode
Refer to PCM mode
Refer to PCM mode M0(SDA/CDOUT)
Refer to PCM mode
Refer to PCM mode
Refer to PCM mode
Refer to PCM mode
DSD Over-
Master Clock Mode
Right Channel Data
Left Channel Data
Pin 10, Input
Function:
Pin 12, Input
Function:
Pin 11, Input
Function:
Pins 13 and 14, Inputs
Function:
DSD Serial Clock
The master clock frequency must be either 4x or 6x the DSD data rate for 64x oversampled DSD data
and 2x or 3x the DSD data rate for 128x oversampled DSD data, refer to Table 7.
This pin determines the allowable Master Clock to DSD data ratio as defined in Table 7.
Clocks the individual bits of the DSD audio data into the DSD_L and DSD_R pins.
Direct Stream Digital audio data is clocked into DSD_L and DSD_R via the DSD serial clock.
Master Clock
Table 7. MCLK to DSD Data Rate Clock Ratios
128x
64x
M2(SCL/CCLK)
M3(AD1/CDIN)
M4(ADO/CS)
DSD_SCLK
CLKMODE
4x
2x
DSD_R
0
DSD_L
DGND
DGND
MCLK
RST
VD
VD
CLKMODE
1
1
2
2
3
4
5
5
6
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
6x
3x
1
VREF
FILT+
FILT-
CMOUT
AOUTL-
AOUTL+
VA
AGND
AOUTR+
AOUTR-
AGND
MUTEC
C/H
MUTE
Refer to PCM mode
Refer to PCM mode
Refer to PCM mode
Refer to PCM mode
Refer to PCM mode
Refer to PCM mode
Refer to PCM mode
Refer to PCM mode
Refer to PCM mode
Refer to PCM mode
Refer to PCM mode
Refer to PCM mode
Refer to PCM mode
Refer to PCM mode
CS4397
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