CS5524-AS Cirrus Logic Inc, CS5524-AS Datasheet
CS5524-AS
Specifications of CS5524-AS
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CS5524-AS Summary of contents
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... Charge Pump Drive for Negative Supply - + Digital Supply Operation l Low Power Consumption: 5.5 mW AIN1+ AIN1- + X20 AIN2+ MUX AIN2- CS5524 AIN3+ Shown AIN3- AIN4+ AIN4- NBV CPD P.O. Box 17847, Austin, Texas 78760 (512) 445 7222 FAX: (512) 445 7581 http://www.cirrus.com ...
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TABLE OF CONTENTS 1. CHARACTERISTICS AND SPECIFICATIONS ........................................................................ 5 ANALOG CHARACTERISTICS ................................................................................................ 5 TYPICAL RMS NOISE, CS5521/23.......................................................................................... 7 TYPICAL NOISE FREE RESOLUTION (BITS), CS5521/23 .................................................... 7 TYPICAL RMS NOISE, CS5522/24/28..................................................................................... 8 TYPICAL NOISE FREE RESOLUTION (BITS), CS5522/24/28 ............................................... 8 5 ...
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Charge Pump Disable ......................................................................... 29 2.2.8.5 Reset System Control Bits .................................................................. 29 2.2.8.6 Data Conversion Error Flags .............................................................. 29 2.3 Calibration ....................................................................................................................... 31 2.3.1 Self Calibration .................................................................................................... 31 2.3.2 System Calibration .............................................................................................. 32 2.3.3 Calibration Tips ................................................................................................... 34 2.3.4 ...
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LIST OF FIGURES Figure 1. Continuous Running SCLK Timing (Not to Scale) ......................................................... 12 Figure 2. SDI Write Timing (Not to Scale) ..................................................................................... 12 Figure 3. SDO Read Timing (Not to Scale) ................................................................................... 12 Figure 4. Multiplexer Configurations.............................................................................................. 13 Figure ...
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CHARACTERISTICS AND SPECIFICATIONS ANALOG CHARACTERISTICS NBV = -2.1 V, XIN = 32.768 kHz, CFS1-CFS0 = ‘00’, OWR (Output Word Rate Hz, Bipolar Mode, Input Range = ±100 mV; See Notes 1 and 2.) Parameter Accuracy Resolution Linearity ...
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ANALOG CHARACTERISTICS Parameter Analog Input Common Mode + Signal on AIN+ or AIN- NBV = -1.8 to -2.5 V Range = 25 mV, 55 mV, or 100 mV Range = NBV = AGND ...
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TYPICAL RMS NOISE, CS5521/23 Output Rate -3 dB Filter (Hz) Frequency 1.88 1.64 3.76 3.27 7.51 6.55 15.0 12.7 30.0 25.4 61.6 (Note 12) 50.4 84.5 (Note 12) 70.7 101.1 (Note 12) 84.6 Notes: 10. Wideband noise aliased into the ...
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TYPICAL RMS NOISE, CS5522/24/28 Output Rate -3 dB Filter (Hz) Frequency 1.88 1.64 3.76 3.27 7.51 6.55 15.0 12.7 30.0 25.4 61.6 (Note 16) 50.4 84.5 (Note 16) 70.7 101.1 (Note 16) 84.6 Notes: 14. Wideband noise aliased into the ...
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V DIGITAL CHARACTERISTICS See Notes 2 and 18.)) Parameter High-Level Input Voltage All Pins Except XIN and SCLK Low-Level Input Voltage All Pins Except XIN and SCLK High-Level Output Voltage All Pins Except CPD and SDO (Note 19) Low-Level ...
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DYNAMIC CHARACTERISTICS Parameter Modulator Sampling Frequency Filter Settling Time to 1/2 LSB (Full Scale Step) RECOMMENDED OPERATING CONDITIONS Parameter DC Power Supplies Analog Reference Voltage Negative Bias Voltage Notes: 20. All voltages with respect to ground. ABSOLUTE MAXIMUM RATINGS Parameter ...
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SWITCHING CHARACTERISTICS Levels: Logic Logic 1 = VD+; C Parameter Master Clock Frequency External Clock or Internal Oscillator (CS5522/24/28) Master Clock Duty Cycle Rise Times Any Digital Input Except SCLK Fall Times Any Digital Input Except ...
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SCLK Figure 1. Continuous Running SCLK Timing (Not to Scale SDI MSB MSB SCLK SDO MSB MSB SCLK ...
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... Hz, 7.51 Hz, 15 Hz, 30 Hz, 61.6 Hz, 84.5 Hz, and 101.1 Hz (XIN = 32.768 kHz). The devices are capable of producing output update rates up to 617 Hz when a 200 kHz (CS5522/24/28 401 Hz using a 130 kHz CS5522 AIN2+ AIN2- AIN1+ AIN1- CS5524 AIN4+ AIN4 AIN1+ AIN1- CS5528 AIN8+ AIN7 ...
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Instrumentation Amplifier The instrumentation amplifier is chopper stabilized and is activated any time conversions are performed with the low level input ranges, 100 mV. The am- plifier is powered from VA+ and from the NBV (Negative Bias Voltage) CS5521/22/23/24/28 ...
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Analog Input Span Considerations The CS5521/22/23/24/28 is designed to measure full scale ranges of 25 mV, 55 mV, 100 mV 2.5 V and 5 V. Other full scale values can be ac- commodated by performing a system ...
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Figure 7 illustrates an example circuit. Re- fer to Applications Note 158 for more details on high ...
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A group of registers, called Channel Set-up Regis- ters, are also included in the converters. These reg- isters are used to hold pre-loaded conversion instructions. Each channel set-up register is 24 bits long and holds two 12-bit conversion instructions (Setups). ...
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System Initialization When power to the CS5521/22/23/24/28 is applied, the chips are held in a reset condition until the 32.768 kHz oscillator has started and a counter- timer elapses. Due to the high Q of the 32.768 kHz crystal, ...
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Command Register Quick Reference D7(MSB CS2 CS1 BIT NAME D7 Command Bit, CB D6-D4 Channel Select Bits, CSB2-CSB0 D3 Read/Write, R/W D2-D0 Register Select Bit, RSB2-RSB0 D7(MSB CSRP3 CSRP2 BIT NAME D7 Command ...
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Command Register Descriptions READ/WRITE INDIVIDUAL OFFSET CALIBRATION REGISTER D7(MSB CS2 : Function These commands are used to access each offset register separately. CS1 - CS0 decode the registers accessed. R/W (Read/Write) 0 Write to selected register. 1 ...
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READ/WRITE CONFIGURATION REGISTER D7(MSB Function: These commands are used to read from or write to the configuration register. R/W (Read/Write) 0 Write to selected register. 1 Read from selected register. READ/WRITE CHANNEL-SETUP REGISTER(S) D7(MSB ...
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PERFORM CONVERSION D7(MSB CSRP3 CSRP2 Function: These commands instruct the ADC to perform conversions on the physical input channel point the pointer bits (CSRP2 - CSRP0) in the channel-setup registers. The particular type of conversion ...
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PERFORM CALIBRATION D7(MSB CSRP3 CSRP2 Function: These commands instruct the ADC to perform a calibration on the physical input channel refer- enced which is chosen by the command byte pointer bits (CSRP3 - CRSP0). CSRP [3:0] (Channel Setup ...
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SYNC1 D7(MSB Function: Part of the serial port re-initialization sequence. SYNC0 D7(MSB Function: End of the serial port re-initialization sequence. NULL D7(MSB Function: This command is used to clear a port ...
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Serial Port Interface The CS5521/22/23/24/28’s serial interface consists of four control lines: CS, SCLK, SDI, SDO. Figure 10 illustrates the serial sequence necessary to write to, or read from the serial port’s registers. CS, Chip Select, is the control ...
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Reading/Writing the Offset, Gain, and Configuration Registers The CS5521/22/23/24/28’s offset, gain, and config- uration registers are accessed individually and can be read from or written to. To write to an offset, a gain, or the configuration register, the user ...
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CSR (Channel-Setup Register (Log. Channel Bits <47:36> Bits <35:24> Bits <23:12> Bits <11:0> CS5521/22 D23(MSB) D22 D21 A1 A0 CS2 D11 D10 CS2 BIT NAME D23-D22/ Latch ...
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Latch Outputs The A1-A0 pins mimic the latch output, D23/D11- D22/D10, bits of the channel-setup registers. A1-A0 can be used to control external multiplexers and oth- er logic functions outside the converter. The outputs can sink or source at ...
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The CS5521/23 typically consume 5.5 mW. The low power mode is an alter- nate mode in the CS5522/24/28 that reduces the consumed power to 5.5 mW entered by setting bit D8 (the low power ...
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... CSR’ accessed. They are also used to determine how . many Setups are converted when MC=1 and a command byte with its 1111 MSB = 1 is issued. Note that the CS5522 has two CSRS, the CS5524 has four CSRs, and the CS5528 has 8 CSRs Standby Mode (Oscillator active, allows quick power-up). ...
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Calibration The CS5521/22/23/24/28 offer four different cali- bration functions including self calibration and sys- tem calibration. However, after the devices are reset, the converter is functional and can perform measurements without being calibrated. In this case, the converter will ...
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AIN- pin must be at the proper common-mode-voltage as specified in ‘Common Mode +Signal AIN+/-’ specification in the Analog Input section (if AIN- = ...
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In either case, the calibration signals must be within the specified calibration limits for each specific calibration step (refer to the ‘System Calibration Specifications’ in ANALOG CHARACTERISTICS system gain calibration is performed the ...
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The variables are defined below First calibration voltage V1 = Second calibration voltage (greater than V0 Result of any uncalibrated conversion Ru0 = Result of uncalibrated conversion V0 (24-bit integer or 2’s complement) Ru1 = Result ...
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Further note that the type of conversion(s) performed and the way to access the resulting data from the FIFO is determined by the MC (multiple conversion), the LP (loop), the RC (read convert), and the DP (depth ...
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SDO line. If, during the first 8 SCLKs, "00000000" is provided on SDI, the converter will remain in this conversion mode, and continue to perform conversions on the selected Setup. To exit this conversion mode, "11111111" must be provid- ed ...
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Repeated Multiple-Setup Conversions without Wait ( this conversion mode, the ADC will repeatedly perform conversions, referencing multiple Setups. The CSRP bits in the command word are ignored in this mode. ...
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SCLKs for each Setup referenced are required to read the conversion words from the data FIFO. The first 8 SCLKs are used to clear the SDO flag. Ev- ery 24 bits thereafter consist of the data words of each Setup ...
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SD0. After ‘11111111’ is provided, 24 additional SCLKs are required to transfer the last 3 bytes of conversion data before the serial port will return to the command mode. Example 3: The configuration register has the following bits as shown: ...
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Once the CSRs are programmed, repeated conver- sions Setups can be performed by is- suing only one command byte. 5) The single conversion mode also requires only one command, but whenever ...
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Conversion Data FIFO Descriptions CS5521/23 (EACH 16-BIT CONVERSIONS) D23 D22 D21 D20 D19 MSB D11 D10 LSB CS5522/24/28 (EACH 24-BIT CONVERSION LEVELS) D23 D22 D21 D20 D19 MSB ...
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Digital Filter The CS5521/22/23/24/28 have eight different lin- ear phase digital filters which set the output word rates (OWRs) shown in Table 3. These rates as- sume that XIN is 32.768 kHz. Each of the filters has a magnitude ...
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Power Supply Arrangements The CS5521/22/23/24/28 A/D converters are de- signed to operate from a single +5 V analog supply and a single + digital supply. A -2.1 V supply is usually generated from the charge ...
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Analog Supply VA+ Figure 22. CS5522 Configured for ground-referenced Unipolar Signals +5V Analog Supply - Figure 23. CS5522 Configured for Single Supply Bridge Measurement VA+ VD+ XOUT 20 VREF+ ...
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Charge Pump Drive Circuits The CPD (Charge Pump Drive) pin of the converter can be used with external components (shown in Figure 21) to develop an appropriate negative bias voltage for the NBV pin. When CPD is used to ...
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The converter input ranges are specified with a voltage reference of 2.5 V. The device can be op- erated ...
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Note that while the RS bit is set to ‘1’ all other register bits in the ADC will be reset to their default state, and the RS bit must be set to ‘0’ for normal operation of the ...
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... XIN XOUT CRYSTAL OUT 10 11 AGND VREF+ VOLTAGE REFERENCE INPUT 1 24 VA+ VREF- VOLTAGE REFERENCE INPUT 2 CS5523 23 CS5524 AIN1+ AIN2+ DIFFERENTIAL ANALOG INPUT 3 22 AIN1- AIN2- DIFFERENTIAL ANALOG INPUT 4 21 AIN3+ AIN4+ DIFFERENTIAL ANALOG INPUT 5 20 AIN3- AIN4- DIFFERENTIAL ANALOG INPUT ...
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... Measurement and Reference Inputs AIN1+, AIN1-, AIN2+, AIN2- AIN3+, AIN3-, AIN4+, AIN4- - Differential Analog Input. Differential input pins into the CS5522 and CS5524 devices. AIN1+, AIN2+, AIN3+, AIN4+, AIN5+, AIN6+, AIN7+, AIN8+ - Single-Ended Analog Input. Single-ended input pins into the CS5528. ...
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NBV - Negative Bias Voltage. Input pin to supply the negative supply voltage for the 20X gain instrumentation amplifier and coarse/fine charge buffers. May be tied to AGND if AIN+ and AIN- inputs are centered around +2 ...
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... AIN- pin). When in bipolar mode (U/B bit = 0). Units are in LSBs. 5. ORDERING GUIDE Model Number Bits Channels Linearity Error (Max) Temperature Range CS5521- CS5521- CS5522- CS5522- CS5523- CS5523- CS5524- CS5524- CS5528- CS5528- DS317F2 0.003% - +85 C 0.003% - +85 C 0.0015% - +85 C 0.0015% - +85 C 0.003% - +85 C 0.003% - +85 C 0.0015% - +85 C 0.0015% - +85 C ...
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PACKAGE DIMENSION DRAWINGS 20 PIN PLASTIC (PDIP) (300 MIL) PACKAGE DRAWING E1 1 TOP VIEW DIM MIN A 0.000 A1 0.015 A2 0.115 b 0.014 b1 0.045 c 0.008 D 0.980 E 0.300 E1 0.240 e 0.090 eA 0.280 ...
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PIN SKINNY PLASTIC (PDIP) (300 MIL) PACKAGE DRAWING E1 1 TOP VIEW DIM MIN A 0.000 A1 0.015 A2 0.115 b 0.014 b1 0.045 c 0.008 D 1.230 E 0.300 E1 0.240 e 0.090 eA 0.280 eB 0.300 eC ...
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SSOP PACKAGE DRAWING TOP VIEW INCHES DIM MIN 0.002 A2 0.064 b 0.009 D 0.272 E 0.291 E1 0.197 e 0.022 L 0.025 0° Notes: 1. “D” and “E1” are reference ...
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SSOP PACKAGE DRAWING TOP VIEW INCHES DIM MIN 0.002 A2 0.064 b 0.009 D 0.311 E 0.291 E1 0.197 e 0.022 L 0.025 0° Notes: 1. “D” and “E1” are reference ...
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