CS5524-AS Cirrus Logic Inc, CS5524-AS Datasheet - Page 26

• Manufacturer Part Number: CS5524-AS
• Description: A/D Converter (A-D) IC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5524-AS

• Sample Rate: 606SPS
• Input Channels Per Adc: 4
• Mounting Type: Surface Mount
• No. Of Channels: 4
• Power Rating: 9mW
• Peak Reflow Compatible (260 C): No
• Supply Voltage Max: 5.25V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

2.2.6 Reading/Writing the Offset, Gain, and
Configuration Registers
The CS5521/22/23/24/28’s offset, gain, and config-
uration registers are accessed individually and can
be read from or written to. To write to an offset, a
gain, or the configuration register, the user must
transmit the appropriate write command which ac-
cesses the particular register and then follow that
command by 24 bits of data (refer to Figure 10 for
details). For example, to write 0x800000 (hexadeci-
mal) to physical channel one’s gain register, the user
would transmit the command byte 0x02 (hexadeci-
mal) and then follow that command byte with the
data 0x800000 (hexadecimal). Similarly, to read
physical channel one’s gain register, the user must
first transmit the command byte 0x0A (hexadeci-
mal) and then read the 24 bits of data. Once an off-
set, a gain, or the configuration register is written to
or read from, the serial port returns to the command
mode.
2.2.7 Reading/Writing the Channel-Setup Reg-
isters
The CS5521/22 have two 24-bit channel-setup reg-
isters (CSRs). The CS5523/24 have four CSRs, and
the CS5528 has eight CSRs (refer to Table 3 for
more detail on the CSRs). These registers are ac-
cessed in conjunction with the depth pointer bits in
the configuration register. Each CSR contains two
12-bit Setups which are programmed by the user to
contain data conversion or calibration information
such as:
1) state of the output latch pins
2) output word rate
3) gain range
4) polarity
5) the address of a physical input channel to be
26
converted.
Once programmed they are used to determine the
mode (e.g. unipolar, 15 Hz, 100 mV range etc.) the
ADC will operate in when future conversions or
calibrations are performed.
To access the CSRs, the user must first initialize the
depth pointer bits in the configuration register as
these bits determine the number of CSRs to read
from or write to. For example, to write CSR1
(Setup1 and Setup2), the user would first program
the configuration register’s depth pointer bits with
‘0001’ binary. This notifies the ADC’s serial port
that only the first CSR is to be accessed. Then, the
user would transmit the write command, 0x05
(hexadecimal) and follow that command with 24-
bits of data. Similarly, to read CSR1, the user must
transmit the command byte 0x0D (hexadecimal)
and then read the 24 bits of data. To write more
than one CSR, for instance CSR1 and CSR2
(Setup1, Setup2, Setup3 and Setup4), the user would
first set the depth pointer bits in the configuration
register to ‘0011’ binary. The user would then trans-
mit the write CSR command 0x05 (hexadecimal)
and follow that with the information for Setup1,
Setup2, Setup 3, and Setup 4 which is 48-bits of in-
formation. Note that while reading/writing CSRs,
two Setups are accessed in pairs as a single 24-bit
CSR register. Even if one of the Setups isn’t used, it
must be written to or read. Further note that the
CSRs are accessed as a closed array, the user can not
access CSR2 without accessing CSR1.
quirement means that the depth bits in the configu-
ration register can only be set to one of the following
states when the CSRs are being read from or written
to: 0001, 0011, 0101, 0111, 1001, 1011, 1101, 1111.
Examples detailing the power of the CSRs are pro-
vided in the Performing Conversions and Reading
the Data Conversion FIFO section. Once the CSRs
are written to or read from, the serial port returns to
the command mode.
CS5521/22/23/24/28
DS317F2
This re-