DSPIC30F2023T-30I/PT Microchip Technology, DSPIC30F2023T-30I/PT Datasheet - Page 283
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DSPIC30F2023T-30I/PT
Manufacturer Part Number
DSPIC30F2023T-30I/PT
Description
12KB, Flash, 512bytes-RAM, 30MIPS, 35I/O, 16-bit Family,nanoWatt 44 TQFP 10x10x1
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.AC164335.pdf
(286 pages)
2.DM300023.pdf
(22 pages)
3.DM300023.pdf
(18 pages)
4.DSPIC30F2011-20ISO.pdf
(66 pages)
5.DSPIC30F2011-20IP.pdf
(26 pages)
6.DSPIC30F1010-30ISO.pdf
(26 pages)
7.DSPIC30F1010-30ISO.pdf
(50 pages)
Specifications of DSPIC30F2023T-30I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F2023T-30I/PTTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F2023T-30I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC30F2023T-30I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Timing Characteristics
Timing Diagrams
Timing Diagrams and Specifications
Timing Diagrams.See Timing Characteristics
Timing Requirements
Timing Specifications
Traps
© 2006 Microchip Technology Inc.
A/D Conversion
Band Gap Start-up Time ........................................... 248
CLKO and I/O ........................................................... 245
External Clock........................................................... 240
I
I
Input Capture (CAPX) ............................................... 251
Motor Control PWM Module...................................... 253
Motor Control PWM Module Falult............................ 253
OC/PWM Module ...................................................... 252
Oscillator Start-up Timer ........................................... 246
Output Compare Module........................................... 251
Power-up Timer ........................................................ 246
Reset......................................................................... 246
SPI Module
Type A, B and C Timer External Clock ..................... 249
Watchdog Timer........................................................ 246
PWM Output ............................................................. 104
Time-out Sequence on Power-up (MCLR
Time-out Sequence on Power-up (MCLR
Time-out Sequence on Power-up (MCLR Tied
DC Characteristics - Internal RC Accuracy............... 242
Band Gap Start-up Time ........................................... 248
Brown-out Reset ....................................................... 247
CLKO and I/O ........................................................... 245
External Clock........................................................... 241
I
I
Input Capture ............................................................ 251
Motor Control PWM Module...................................... 253
Oscillator Start-up Timer ........................................... 247
Output Compare Module........................................... 251
Power-up Timer ........................................................ 247
Reset......................................................................... 247
Simple OC/PWM Mode............................................. 252
SPI Module
Type A Timer External Clock .................................... 249
Type B Timer External Clock .................................... 250
Type C Timer External Clock .................................... 250
Watchdog Timer........................................................ 247
PLL Clock.................................................................. 242
Trap Sources .............................................................. 49
2
2
2
2
C Bus Data
C Bus Start/Stop Bits
C Bus Data (Master Mode)..................................... 260
C Bus Data (Slave Mode)....................................... 262
10-Bit High-speed (CHPS = 01,
Master Mode ..................................................... 259
Slave Mode ....................................................... 261
Master Mode ..................................................... 259
Slave Mode ....................................................... 261
Master Mode (CKE = 0) .................................... 254
Master Mode (CKE = 1) .................................... 255
Slave Mode (CKE = 0) ...................................... 256
Slave Mode (CKE = 1) ...................................... 257
Not Tied to V
Not Tied to V
to V
Master Mode (CKE = 0) .................................... 254
Master Mode (CKE = 1) .................................... 255
Slave Mode (CKE = 0) ...................................... 256
Slave Mode (CKE = 1) ...................................... 258
DD
SIMSAM = 0, ASAM = 0, SSRC = 000) .... 264
) .............................................................. 211
DD
DD
), Case 1 .................................. 211
), Case 2 .................................. 212
Preliminary
U
UART
UART1 Mode Register (U1MODE)................................... 164
UART1 Register Map........................................................ 168
UART1 Status and Control Register (U1STA).................. 166
Unit ID Locations .............................................................. 197
Universal Asynchronous Receiver Transmitter. See UART
W
Wake-up from Sleep ......................................................... 197
Wake-up from Sleep and Idle ............................................. 51
Watchdog Timer
Watchdog Timer (WDT)............................................ 197, 214
WWW Address ................................................................. 273
WWW, On-Line Support ....................................................... 8
dsPIC30F1010/202X
Baud Rate Generator (BRG) .................................... 162
Enabling and Setting Up UART ................................ 162
IrDA
Receiving
Transmitting
Timing Characteristics .............................................. 246
Timing Requirements ............................................... 247
Enabling and Disabling............................................. 214
Operation.................................................................. 214
Built-in Encoder and Decoder........................... 163
8-bit or 9-bit Data Mode.................................... 163
8-bit Data Mode ................................................ 163
9-bit Data Mode ................................................ 163
Break and Sync Sequence ............................... 163
DS70178C-page 281