DSPIC30F2023T-30I/PT Microchip Technology, DSPIC30F2023T-30I/PT Datasheet - Page 3
![12KB, Flash, 512bytes-RAM, 30MIPS, 35I/O, 16-bit Family,nanoWatt 44 TQFP 10x10x1](/photos/6/82/68251/c04-076_pt_sml.jpg)
DSPIC30F2023T-30I/PT
Manufacturer Part Number
DSPIC30F2023T-30I/PT
Description
12KB, Flash, 512bytes-RAM, 30MIPS, 35I/O, 16-bit Family,nanoWatt 44 TQFP 10x10x1
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.AC164335.pdf
(286 pages)
2.DM300023.pdf
(22 pages)
3.DM300023.pdf
(18 pages)
4.DSPIC30F2011-20ISO.pdf
(66 pages)
5.DSPIC30F2011-20IP.pdf
(26 pages)
6.DSPIC30F1010-30ISO.pdf
(26 pages)
7.DSPIC30F1010-30ISO.pdf
(50 pages)
Specifications of DSPIC30F2023T-30I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F2023T-30I/PTTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F2023T-30I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC30F2023T-30I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- AC164335 PDF datasheet
- DM300023 PDF datasheet #2
- DM300023 PDF datasheet #3
- DSPIC30F2011-20ISO PDF datasheet #4
- DSPIC30F2011-20IP PDF datasheet #5
- DSPIC30F1010-30ISO PDF datasheet #6
- DSPIC30F1010-30ISO PDF datasheet #7
- Current page: 3 of 286
- Download datasheet (5Mb)
High-Performance Modified RISC CPU:
• Modified Harvard architecture
• C compiler optimized instruction set architecture
• 83 base instructions with flexible addressing
• 24-bit wide instructions, 16-bit wide data path
• 12 Kbytes on-chip Flash program space
• 512 bytes on-chip data RAM
• 16 x 16-bit working register array
• Up to 30 MIPS operation:
• 32 interrupt sources
• Three external interrupt sources
• 8 user-selectable priority levels for each interrupt
• 4 processor exceptions and software traps
DSP Engine Features:
• Modulo and Bit-Reversed modes
• Two 40-bit wide accumulators with optional
• 17-bit x 17-bit single-cycle hardware fractional/
• Single-cycle Multiply-Accumulate (MAC)
• 40-stage Barrel Shifter
• Dual data fetch
© 2006 Microchip Technology Inc.
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the “dsPIC30F Family Reference
Manual” (DS70046). For more information on the device
instruction set and programming, refer to the “dsPIC30F/
33F Programmer’s Reference Manual” (DS70157).
modes
- Dual Internal RC
- 32X PLL with 480 MHz VCO
- PLL inputs ±3%
- External EC clock 6.0 to 14.55 MHz
- HS Crystal mode 6.0 to 14.55 MHz
saturation logic
integer multiplier
operation
- 9.7 and 14.55 MHz (±1%) Industrial Temp
- 6.4 and 9.7 MHz (±1%) Extended Temp
28/44-Pin dsPIC30F1010/202X Enhanced Flash
SMPS 16-Bit Digital Signal Controller
dsPIC30F1010/202X
Preliminary
Peripheral Features:
• High-current sink/source I/O pins: 25 mA/25 mA
• Three 16-bit timers/counters; optionally pair up
• One 16-bit Capture input functions
• Two 16-bit Compare/PWM output functions
• 3-wire SPI modules (supports 4 Frame modes)
• I
• UART Module:
Power Supply PWM Module Features:
• Four PWM generators with 8 outputs
• Each PWM generator has independent time base
• Duty cycle resolution of 1.1 ns at 30 MIPS
• Individual dead time for each PWM generator:
• Phase-shift resolution of 4.2 ns @ 30 MIPS
• Frequency resolution of 8.4 ns @ 30 MIPS
• PWM modes supported:
• Independent Current-Limit and Fault Inputs
• Output Override Control
• Special Event Trigger
• PWM generated ADC Trigger
16-bit timers into 32-bit timer modules
- Dual Compare mode available
and 7-bit/10-bit addressing
- Supports RS-232, RS-485 and LIN 1.2
- Supports IrDA
- Auto wake-up on Start bit
- Auto-Baud Detect
- 4-level FIFO buffer
and duty cycle
- Dead-time resolution 4.2 ns at 30 MIPS
- Dead time for rising and falling edges
- Complementary
- Push-Pull
- Multi-Phase
- Variable Phase
- Current Reset
- Current-Limit
2
C
TM
module supports Multi-Master/Slave mode
®
with on-chip hardware endec
DS70178C-page 1
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