DSPIC30F6012AT-20E/PF Microchip Technology, DSPIC30F6012AT-20E/PF Datasheet - Page 229

16-bit MCU/DSP 30MIPS 144KB 64 TQFP 14x14x1mm T/R

DSPIC30F6012AT-20E/PF

Manufacturer Part Number
DSPIC30F6012AT-20E/PF
Description
16-bit MCU/DSP 30MIPS 144KB 64 TQFP 14x14x1mm T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F6012AT-20E/PF

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
144KB (48K x 24)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F6012AT-20E/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
T
Table Instruction Operation Summary ................................ 51
Temperature and Voltage Specifications
Timer1 Module .................................................................... 67
Timer2 and Timer3 Selection Mode .................................... 86
Timer2/3 Module ................................................................. 71
Timer4/5 Module ................................................................. 77
Timing Characteristics
Timing Diagrams
© 2011 Microchip Technology Inc.
AC ............................................................................. 183
16-bit Asynchronous Counter Mode ........................... 67
16-bit Synchronous Counter Mode ............................. 67
16-bit Timer Mode....................................................... 67
Gate Operation ........................................................... 68
Interrupt....................................................................... 68
Operation During Sleep Mode .................................... 68
Prescaler..................................................................... 68
Real-Time Clock ......................................................... 68
Register Map............................................................... 70
16-bit Timer Mode....................................................... 71
32-bit Synchronous Counter Mode ............................. 71
32-bit Timer Mode....................................................... 71
ADC Event Trigger...................................................... 74
Gate Operation ........................................................... 74
Interrupt....................................................................... 74
Operation During Sleep Mode .................................... 74
Register Map............................................................... 75
Timer Prescaler........................................................... 74
Register Map............................................................... 79
ADC
Band Gap Start-up Time ........................................... 190
CAN Module I/O........................................................ 207
CLKOUT and I/O....................................................... 187
DCI Module
External Clock........................................................... 183
I
I
Input Capture (CAPX) ............................................... 193
OC/PWM Module ...................................................... 194
Oscillator Start-up Timer ........................................... 188
Output Compare Module........................................... 193
Power-up Timer ........................................................ 188
Reset......................................................................... 188
SPI Module
Type A, B and C Timer External Clock ..................... 191
Watchdog Timer (WDT) ............................................ 188
CAN Bit ..................................................................... 116
Frame Sync, AC-Link Start of Frame........................ 126
Frame Sync, Multi-Channel Mode ............................ 126
I
PWM Output ............................................................... 87
Time-out Sequence on Power-up
2
2
2
C Bus Data
C Bus Start/Stop Bits
S Interface Frame Sync.......................................... 126
Interrupts............................................................. 69
Oscillator Operation ............................................ 69
Low-speed (ASAM = 0, SSRC = 000) .............. 209
AC-Link Mode ................................................... 197
Multichannel, I
Master Mode ..................................................... 203
Slave Mode ....................................................... 205
Master Mode ..................................................... 203
Slave Mode ....................................................... 205
Master Mode (CKE = 0) .................................... 198
Master Mode (CKE = 1) .................................... 199
Slave Mode (CKE = 0) ...................................... 200
Slave Mode (CKE = 1) ...................................... 201
2
dsPIC30F6011A/6012A/6013A/6014A
S Modes ................................... 195
Timing Diagrams.See Timing Characteristics
Timing Requirements
Timing Specifications
Trap Vectors ....................................................................... 48
Traps .................................................................................. 47
U
UART Module
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Band Gap Start-up Time........................................... 190
Brown-out Reset....................................................... 189
CAN Module I/O ....................................................... 207
CLKOUT and I/O ...................................................... 187
DCI Module
External Clock .......................................................... 184
I
I
Input Capture............................................................ 193
Oscillator Start-up Timer........................................... 189
Output Compare Module .......................................... 193
Power-up Timer ........................................................ 189
Reset ........................................................................ 189
Simple OC/PWM Mode ............................................ 194
SPI Module
Type A Timer External Clock.................................... 191
Type B Timer External Clock.................................... 192
Type C Timer External Clock.................................... 192
Watchdog Timer (WDT)............................................ 189
External Clock Requirements ................................... 184
PLL Clock ................................................................. 185
PLL Jitter .................................................................. 185
Hard and Soft ............................................................. 48
Sources ...................................................................... 47
Address Detect Mode ............................................... 107
Auto Baud Support ................................................... 108
Baud Rate Generator ............................................... 107
Enabling and Setting Up........................................... 105
Framing Error (FERR) .............................................. 107
Idle Status................................................................. 107
Loopback Mode ........................................................ 107
Operation During CPU Sleep and Idle Modes.......... 108
Overview................................................................... 103
Parity Error (PERR) .................................................. 107
Receive Break .......................................................... 107
Receive Buffer (UxRXB)........................................... 106
Receive Buffer Overrun Error (OERR Bit) ................ 106
Receive Interrupt ...................................................... 106
Receiving Data ......................................................... 106
Receiving in 8-bit or 9-bit Data Mode ....................... 106
Reception Error Handling ......................................... 106
Transmit Break ......................................................... 106
Transmit Buffer (UxTXB) .......................................... 105
2
2
C Bus Data (Master Mode) .................................... 204
C Bus Data (Slave Mode) ...................................... 206
(MCLR Not Tied to V
(MCLR Not Tied to V
(MCLR Tied to V
AC-Link Mode................................................... 197
Multichannel, I
Master Mode (CKE = 0).................................... 198
Master Mode (CKE = 1).................................... 199
Slave Mode (CKE = 0)...................................... 200
Slave Mode (CKE = 1)...................................... 202
Address Error Trap ............................................. 47
Math Error Trap .................................................. 47
Oscillator Fail Trap ............................................. 48
Stack Error Trap ................................................. 48
2
S Modes................................... 196
DD
) ......................................... 154
DD
DD
), Case 1 ..................... 154
), Case 2 ..................... 154
DS70143E-page 229

Related parts for DSPIC30F6012AT-20E/PF