PIC12CE519-04E/SN Microchip Technology, PIC12CE519-04E/SN Datasheet - Page 254
PIC12CE519-04E/SN
Manufacturer Part Number
PIC12CE519-04E/SN
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,8PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12C508A-04SM.pdf
(113 pages)
3.PIC12C508A-04SM.pdf
(4 pages)
4.PIC12CE518-04SM.pdf
(16 pages)
Specifications of PIC12CE519-04E/SN
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.5KB (1K x 12)
Program Memory Type
OTP
Eeprom Size
16 x 8
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
309-1046 - ADAPTER 8-SOIC TO 8-DIP309-1045 - ADAPTER 8-SOIC TO 8-DIP
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F688T-ISL PDF datasheet
- PIC12C508A-04SM PDF datasheet #2
- PIC12C508A-04SM PDF datasheet #3
- PIC12CE518-04SM PDF datasheet #4
- Current page: 254 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
Register 16-2:
DS31016A-page 16-4
bit 7
bit 6
bit 5
bit 4
SSPCON: Synchronous Serial Port Control Register
bit 7
WCOL: Write Collision Detect bit
1 = The SSPBUF register is written while it is still transmitting the previous word
0 = No collision
SSPOV: Receive Overflow Indicator bit
In SPI mode:
1 = A new byte is received while the SSPBUF register is still holding the previous data. In case
0 = No overflow
In I
1 = A byte is received while the SSPBUF register is still holding the previous byte. SSPOV is a
0 = No overflow
SSPEN: Synchronous Serial Port Enable bit
In both modes, when enabled, these pins must be properly configured as input or output.
In SPI mode:
1 = Enables serial port and configures SCK, SDO, SDI, and SS as the source of the
0 = Disables serial port and configures these pins as I/O port pins
In I
1 = Enables the serial port and configures the SDA and SCL pins as the source of the
0 = Disables serial port and configures these pins as I/O port pins
CKP: Clock Polarity Select bit
In SPI mode:
1 = Idle state for clock is a high level
0 = Idle state for clock is a low level
In I
SCK release control
1 = Enable clock
0 = Holds clock low (clock stretch) (Used to ensure data setup time)
WCOL
R/W-0
2
2
2
serial port pins
serial port pins
(must be cleared in software)
of overflow, the data in SSPSR is lost. Overflow can only occur in slave mode. The user
must read the SSPBUF, even if only transmitting data, to avoid setting overflow. In master
mode the overflow bit is not set since each new reception (and transmission) is initiated by
writing to the SSPBUF register.
“don‘t care” in transmit mode. SSPOV must be cleared in software in either mode.
C mode:
C mode:
C mode:
SSPOV
R/W-0
SSPEN
R/W-0
R/W-0
CKP
SSPM3
R/W-0
SSPM2
R/W-0
1997 Microchip Technology Inc.
SSPM1
R/W-0
bit 0
SSPM0
R/W-0
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