PIC16C781-I/SO Microchip Technology, PIC16C781-I/SO Datasheet
PIC16C781-I/SO
Specifications of PIC16C781-I/SO
Related parts for PIC16C781-I/SO
PIC16C781-I/SO Summary of contents
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... CMOS Microcontrollers with A/D, D/A, OPAMP, Comparators and PSMC 2001 Microchip Technology Inc. PIC16C781/782 Data Sheet Preliminary DS41171A ...
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... Serialized Quick Term Programming (SQTP service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2001, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system ...
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... Wide operating voltage range: - 2.5V to 5.5V for commercial and industrial temperature ranges - Extended temperature range available 2001 Microchip Technology Inc. PIC16C781/782 Microcontroller Core Features (Continued): • Low power, high speed CMOS EPROM technology • Fully static design • Low power consumption: - < ...
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... PWM and PSM modes - Programmable switching frequency - Configurable for either single or dual feedback inputs - Configurable single or dual outputs 2 - Slope compensation output available in single output mode PIC16C781 MHz POR, BOR, MCLR, WDT (PWRT, OST) POR, BOR, MCLR, WDT (PWRT, OST) 1K 128 Input only 2 ...
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... Index .................................................................................................................................................................................................. 175 On-Line Support................................................................................................................................................................................. 181 Reader Response .............................................................................................................................................................................. 182 PIC16C781/782 Product Identification System .................................................................................................................................. 183 TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced ...
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... PIC16C781/782 NOTES: DS41171A-page 4 Preliminary 2001 Microchip Technology Inc. ...
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... PIC16C781/782 manual is highly recommended reading for a better understanding of the device architecture and operation of the peripheral modules. This data sheet covers two devices: PIC16C781 and PIC16C782. Both devices come in a variety of 20-pin packages. The following figures are block diagrams of the PIC16C781 and the PIC16C782. ...
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... PIC16C781/782 FIGURE 1-2: PIC16C782 BLOCK DIAGRAM 13 Program Counter EPROM Program Memory 8 Level Stack (13-bit) Program Memory Program 14 Read (PMR) Bus Instruction reg Direct Addr 8 Power-up Timer Oscillator Instruction Start-up Timer Decode & OSC1/ Control Power-on CLKIN Reset Timing Watchdog Generation Timer ...
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... DAC RB2/AN6 RB3/AN7/OPA DAC AN4 AN5 AN6 AN7 V 1 REF V DAC AN4 AN5 AN6 AN7 V 2 REF V DAC DARS<1:0> REF N/C 3 2001 Microchip Technology Inc. PIC16C781/782 OPAON VCFG<1:0> CMPEN GBWP AV DD CHS<2:0> REF DAC ADON 6 GO/DONE EN 7 CHS3 REFERENCE 1 VREN CHS0 2 C1CH< ...
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... PIC16C781/782 TABLE 1-1: PIC16C781/782 PINOUT DESCRIPTION Name Function RA0 RA0/AN0/OPA+ AN0 OPA+ RA1 RA1/AN1/OPA- AN1 OPA- RA2 RA2/AN2/V 2 REF AN2 V REF RA3 RA3/AN3/V 1 REF AN3 V REF RA4/T0CKI RA4 TOCKI RA5 RA5/MCLR/V PP MCLR V PP RA6 OSC2 RA6/OSC2/CLKOUT/T1CKI CLKOUT T1CKI RA7 RA7/OSC1/CLKIN OSC1 ...
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... TABLE 1-1: PIC16C781/782 PINOUT DESCRIPTION (CONTINUED) Name Function RB7 C2 RB7/C2/PSMC1B/T1G PSMC1B T1G Legend Schmitt Trigger AN = Analog XTAL = Crystal CMOS = CMOS Output 2001 Microchip Technology Inc. PIC16C781/782 Input Output Type Type TTL CMOS Bi-directional I/O — CMOS Comparator 2 Output CMOS PSMC Output 1B — ...
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... PIC16C781/782 NOTES: DS41171A-page 10 Preliminary 2001 Microchip Technology Inc. ...
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... Program Memory Organization The PIC16C781/782 devices have a 13-bit program counter capable of addressing program memory space. The PIC16C781 has words of program memory. The PIC16C782 has words of program memory. Accessing a location above the physically implemented address causes a wraparound. The RESET vector is at 0000h and the interrupt vector is at 0004h ...
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... PIC16C781/782 FIGURE 2-3: REGISTER FILE MAP File Address (*) Indirect addr. 00h Indirect addr. TMR0 01h OPTION_REG 02h PCL STATUS 03h STATUS FSR 04h PORTA 05h 06h PORTB 07h 08h 09h PCLATH 0Ah PCLATH INTCON 0Bh INTCON 0Ch PIR1 0Dh TMR1L 0Eh ...
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... GENERAL PURPOSE REGISTER FILE The register file can be accessed either directly, or indi- rectly, through the File Select Register (FSR). TABLE 2-1: PIC16C781/782 SPECIAL FUNCTION REGISTER SUMMARY Address Name Bit 7 Bit 6 Bank 0 (2) 00h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) ...
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... PIC16C781/782 TABLE 2-1: PIC16C781/782 SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED) Address Name Bit 7 Bit 6 Bank 1 (2) 80h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) 81h OPTION_REG RBPU INTEDG (2) 82h PCL Program Counter’s (PC) Least Significant Byte ...
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... TABLE 2-1: PIC16C781/782 SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED) Address Name Bit 7 Bit 6 Bank 2 (2) 100h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) 101h TMR0 Timer0 Module’s Register (2) 102h PCL Program Counter's (PC) Least Significant Byte ...
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... PIC16C781/782 TABLE 2-1: PIC16C781/782 SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED) Address Name Bit 7 Bit 6 Bank 3 (2) 180h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) 181h OPTION_REG RBPU INTEDG (2) 182h PCL Program Counter’s (PC) Least Significant Byte ...
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... Legend Readable bit - n = Value at POR 2001 Microchip Technology Inc. PIC16C781/782 For example, CLRF STATUS clears the upper three bits and sets the Z bit. This leaves the STATUS register as 000u u1uu (where u = unchanged recommended, therefore, that only BCF, BSF, ...
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... PIC16C781/782 2.4 OPTION_REG Register The OPTION_REG register is a readable and writable register which contains various control bits to configure: • TMR0 prescaler/WDT postscaler (single assign- able register known also as the prescaler) • External INT interrupt • TMR0 • Weak pull-ups on PORTB REGISTER 2-2: ...
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... R/W-0 R/W-0 R/W-0 R/W-0 PEIE T01E INTE RBIE (1) ( Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared Preliminary PIC16C781/782 R/W-0 R/W-0 R/W-x T0IF INTF RBIF bit Bit is unknown DS41171A-page 19 ...
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... PIC16C781/782 2.6 PIE1 Register The PIE1 register contains the individual enable bits for the peripheral interrupts. REGISTER 2-4: PERIPHERAL INTERRUPT ENABLE REGISTER (PIE1: 8Ch) R/W-0 R/W-0 LVDIE bit7 bit 7 LVDIE: Low Voltage Detect Interrupt Enable bit 1 = LVD interrupt is enabled 0 = LVD interrupt is disabled ...
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... TMR1 register overflowed (must be cleared in software TMR1 register did not overflow Legend Readable bit - n = Value at POR 2001 Microchip Technology Inc. PIC16C781/782 Note: Interrupt flag bits are set when an interrupt condition occurs, regardless of the state of its corresponding enable bit, or the global enable bit, GIE (INTCON<7>). User soft- ...
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... PIC16C781/782 2.8 PCON Register The Power Control (PCON) register contains two flag bits to allow determination of the source of the most recent RESET: • Power-on Reset (POR) • External MCLR Reset • Power Supply Brown-out (BOR) Reset The Power Control register also contains frequency select bits for the INTRC oscillator and the WDT soft- ware enable bit ...
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... All updates to the PCH register occur through the PCLATH register. 2.9.1 PROGRAM MEMORY PAGING PIC16C781/782 devices are capable of addressing a continuous 8K word block of program memory. The CALL and GOTO instructions provide only 11 bits of address to allow branching within any 2K program memory page ...
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... PIC16C781/782 FIGURE 2-5: DIRECT/INDIRECT ADDRESSING Direct Addressing From Opcode RP1:RP0 6 Bank Select Location Select 00h Data (1) Memory 7Fh Bank 0 Note 1: For register file map detail, see Figure 2-3. 2.12 Effect of RESET on Core Registers Refer to Table 2-2 for the effect of a RESET operation on core registers ...
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... PICmicro™ Mid-Range Reference Manual (DS33023) 3.1 I/O Port Analog/Digital Mode The PIC16C781/782 has two I/O ports: PORTA and PORTB. Some of these port pins are mixed signal (can be digital or analog). When an analog signal is present on a pin, the pin must be configured as an analog input ...
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... PIC16C781/782 3.2 PORTA and the TRISA Register PORTA is an 8-bit wide, bi-directional port with the exception of RA0, RA1 and RA5, which are inputs only. The corresponding data direction register is TRISA. Setting a TRISA bit (= 1) makes the corresponding PORTA pin an input (i.e., disables the digital output). ...
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... FIGURE 3-1: BLOCK DIAGRAM OF RA0/AN0/OPA+ PIN RD ANSEL RD TRISA Data Bus ANSEL Reg ANSEL CK RD PORTA Analog Function Enable AN0/OPA+ (see Figure 1-3) ANSEL<0> 2001 Microchip Technology Inc. PIC16C781/782 Data Reg TRISA<0> FUNCTION PORTA<0> READ x Digital In Pin x Analog In 0 Preliminary V DD RA0/AN0/OPA+ ...
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... PIC16C781/782 FIGURE 3-2: BLOCK DIAGRAM OF RA1/AN1/OPA- PIN RD ANSEL RD TRISA Data Bus ANSEL Reg ANSEL CK RD PORTA Analog Function Enable AN1/OPA- (see Figure 1-3) ANSEL<1> DS41171A-page Data Reg TRISA<1> FUNCTION PORTA<1> READ x Digital In Pin x Analog In 0 Preliminary V DD RA1/AN1/OPA 2001 Microchip Technology Inc. ...
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... BLOCK DIAGRAM OF RA2/AN2/V RD ANSEL Data Bus Data Reg PORTA CK TRIS Reg TRISA CK RD TRISA ANSEL Reg ANSEL CK RD PORTA Analog Function Enable AN2/V 2 (see Figure 1-3) REF ANSEL<2> 2001 Microchip Technology Inc. PIC16C781/782 2 PIN REF Data Reg TRISA<2> FUNCTION PORTA<2> READ 1 Digital In Pin 0 ...
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... PIC16C781/782 FIGURE 3-4: BLOCK DIAGRAM OF RA3/AN3/V RD ANSEL Data Bus Data Reg PORTA CK TRIS Reg TRISA CK RD TRISA ANSEL Reg ANSEL CK RD PORTA Analog Function Enable AN3/V 1 (see Figure 1-3) REF ANSEL<3> DS41171A-page 30 1 PIN REF Data Reg TRISA<3> FUNCTION PORTA<3> READ ...
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... BLOCK DIAGRAM OF RA4/T0CKI PIN Data Reg. Data Bus D WR PORTA CK TRIS Reg TRISA CK RD TRISA RD PORTA TMR0 Clock Input TRISA<4> 2001 Microchip Technology Inc Vss Q Data Reg PORTA<4> FUNCTION PORTA<4> READ x Digital In Pin 0 0 Output Pin 1 Hi-Z Output Pin Preliminary PIC16C781/782 RA4/T0CKI Vss DS41171A-page 31 ...
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... PIC16C781/782 FIGURE 3-6: BLOCK DIAGRAM OF RA5/MCLR/V MCLRE To MCLR Circuit Program Mode Data Bus RD TRISA RD PORTA MCLRE Internal External Note 1: See Configuration Word <5>, Register 14-1. DS41171A-page 32 PIN PP MCLR Filter HV Detect V SS Data Reg (1) TRISA<5> FUNCTION PORTA<5> READ x Digital In x MCLR Preliminary ...
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... EN PIN FUNCTION N/A OSC2 N/A CLKOUT Enabled OSC2 (TMR1) Disabled Digital I/O N/A Digital I/O N/A Digital I/O w/o = without <2:0>, Register 14-1. OSC Preliminary PIC16C781/782 V DD RA6/OSC2/CLKOUT/T1CKI V SS (see Table) T1CKI PORTA<6> READ N/A 0 N/A 0 N/A 0 Available Pin Available Pin ...
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... PIC16C781/782 FIGURE 3-8: BLOCK DIAGRAM OF RA7/OSC1/CLKIN PIN Data Reg. Data Bus PORTA CK Q TRIS Reg TRISA TRISA Data Reg PORTA (1) OSC MODE TMR1 OSCILLATOR LP, XT INTRC INTRC N/A = Not Available Note 1: See Configuration Word F TABLE 3-1: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA ...
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... ANSEL register must have bit 5 set to configure the RB1 pin as an analog I/O. 2001 Microchip Technology Inc. PIC16C781/782 Pin RB2 is multiplexed with the analog function ADC/ Comparator Input AN6. When the pin is used as an analog input, the ANSEL register must have bit 6 to select the Analog mode for the pin ...
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... PIC16C781/782 REGISTER 3-2: WEAK PULL-UP PORTB REGISTER (WPUB: 95h) R/W-1 R/W-1 WPUB7 WPUB6 bit7 bit 7-0 WPUB<7:0>: PORTB Weak Pull-Up Control bits 1 = Weak pull-up enabled for corresponding pin 0 = Weak pull-up disabled for corresponding pin Note 1: For the WPUB register setting to take effect, the RBPU bit in the OPTION_REG register must be cleared ...
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... Q WR TRISB TRISB ANSEL Reg ANSEL ANSEL IOCB Reg Set RBIF WR IOCB IOCB RD PORTB INT Input Analog Function Enable AN4/V R VREN & VROE ANSEL<4> 2001 Microchip Technology Inc. PIC16C781/782 PIN R V Output RBPU ... Q D From other EN RB<7:0> pins TRISB<0> FUNCTION 0 1 Digital In ...
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... PIC16C781/782 FIGURE 3-10: BLOCK DIAGRAM OF RB1/AN5/V DAON DAOE WPUB Reg. Data Bus WPUB WPUB PORTB Reg PORTB CK Q TRIS Reg TRISB TRISB ANSEL Reg ANSEL ANSEL IOCB Reg IOCB IOCB RD PORTB Analog Function Enable AN5/V DAC DAON & DAOE ANSEL<5> DS41171A-page 38 ...
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... IOCB Reg IOCB IOCB RD PORTB Analog Function Enable AN6 ANSEL<6> 2001 Microchip Technology Inc. RBPU Set RBIF ... Q From other RB<7:0> pins TRISB<2> FUNCTION PORTB<2> READ 1 Digital In 0 Digital Out x Analog In Preliminary PIC16C781/782 V DD Weak P Pull- RB2/AN6 V SS TTL Pin Pin 0 DS41171A-page 39 ...
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... PIC16C781/782 FIGURE 3-12: BLOCK DIAGRAM OF RB3/AN7/OPA PIN CAL_ACTIVE OPAON WPUB Reg. Data Bus WPUB WPUB PORTB Reg PORTB CK Q TRIS Reg TRISB TRISB ANSEL Reg ANSEL ANSEL IOCB Reg Set RBIF WR IOCB IOCB RD PORTB Analog Function Enable AN7/OPA OPA MODULE OPAON ...
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... WR PORTB CK TRIS Reg TRISB CK RD TRISB RD IOCB IOCB Reg IOCB CK RD PORTB TRISB<4> 2001 Microchip Technology Inc RBPU Set RBIF ... Q From other RB<7:0> pins FUNCTION PORTB<4> READ 0 Digital Out Pin 1 Digital In Pin Preliminary PIC16C781/782 V DD Weak P Pull- RB4 V SS TTL DS41171A-page 41 ...
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... PIC16C781/782 FIGURE 3-14: BLOCK DIAGRAM OF RB5 PIN WPUB Reg. Data Bus D WR WPUB CK RD WPUB PORTB Reg PORTB CK TRIS Reg TRISB CK RD TRISB RD IOCB IOCB Reg IOCB CK RD PORTB TRISB<5> DS41171A-page RBPU Set RBIF ... Q From other RB<7:0> pins FUNCTION PORTB<5> READ ...
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... RD IOCB IOCB Reg IOCB CK Q Serial Programming Clock PSMC SMCON COMPARATOR C1OE 2001 Microchip Technology Inc. RBPU Q Set RBIF Q From other RB<7:0> pins PORTB TRISB<6> Preliminary PIC16C781/782 V DD Weak Pull- RB6/C1/PSMC1A TTL Port EN Q3 FUNCTION Digital In Digital Out C1OUT PSMC1A DS41171A-page 43 ...
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... PIC16C781/782 FIGURE 3-16: BLOCK DIAGRAM OF RB7/C2/PSMC1B/T1G PIN RD WPUB WPUB Reg. Data Bus WPUB CK Q Data Reg PORTB CK Q TRIS Reg TRISB TRISB RD IOCB RD PORTB IOCB Reg IOCB CK Q Serial Programming Data and Timer1 Gate Set RBIF From other RB<7:0> pins PSMC MODULE ...
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... T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111 AN6 AN5 AN4 AN3 AN2 AN1 AN0 1111 1111 1111 1111 Preliminary PIC16C781/782 Value on Value on: all other POR, BOR RESETS 1111 1111 1111 1111 1111 1111 1111 1111 1111 0000 1111 0000 ...
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... PIC16C781/782 NOTES: DS41171A-page 46 Preliminary 2001 Microchip Technology Inc. ...
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... Bit is cleared U-0 R/W-0 R/W-0 R/W-0 — PMD13 PMD12 PMD11 W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared Preliminary PIC16C781/782 U-0 U-0 R/S-0 — — RD bit0 x = Bit is unknown R/W-0 R/W-0 R/W-0 PMD10 PMD9 ...
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... PIC16C781/782 REGISTER 4-3: PROGRAM MEMORY DATA LOW (PMDATL: 10Ch) R/W-0 R/W-0 PMD7 PMD6 bit7 bit 7-0 PMD<7:0>: Program Memory Data bits The value of the program memory word pointed to by PMADRH and PMADRL after a program memory read command. Legend Readable bit - n = Value at POR ...
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... MOVWF PROG_DATA_LO MOVF PMDATH,W ; Get MSB of word MOVWF PROG_DATA_HI 2001 Microchip Technology Inc. PIC16C781/782 in the following instructions. PMDATH and PMDATL registers hold this value until another read or until RESET. bit RD Note 1: Interrupts must be disabled during the time from setting PMCON1<0> (RD) to the second instruction thereafter ...
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... PIC16C781/782 4.4 Program Memory Read With Code Protect Set When the device is code protected, the CPU can still perform the program memory read function. TABLE 4-1: SUMMARY OF REGISTERS ASSOCIATED WITH PMR Address Name Bit 7 Bit 6 10Ch PMDATL PMD7 PMD6 10Dh PMADRL ...
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... Timer0 bit T0SE PSOUT 1 Sync with Internal Clocks Programmable 0 Prescaler ( PS<2:0> PSA Preliminary PIC16C781/782 INITIALIZING TIMER0 TMR0 ; Select Bank 0 TMR0 ; Clear Timer0 ; Register OPTION_REG ; Select Bank 1 B’11000011’ ; INT on L2H OPTION_REG ; Internal clk, ; pscaler 1:16 INTCON,T0IF ; Check for TMR0 ; overflow T0_OVFL_WAIT ...
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... PIC16C781/782 5.2 Prescaler An 8-bit counter is available as a prescaler for the Timer0 module postscaler for the Watchdog Timer, respectively (Figure 5-2). For simplicity, this counter is referred to as “prescaler” throughout this data sheet. Note: There is only one prescaler available which is mutually exclusively shared between the Timer0 module and the Watchdog Timer ...
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... Bit 4 Bit 3 Bit 2 Bit 1 ADIF T0IE INTE RBIE T0IF INTF T0CS T0SE PSA PS2 Preliminary PIC16C781/782 Data Bus 8 TMR0 reg Set Interrupt Flag bit T0IF on Overflow Value on Value on: Bit 0 all other POR, BOR RESETS xxxx xxxx uuuu uuuu RBIF 0000 000x ...
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... PIC16C781/782 NOTES: DS41171A-page 54 Preliminary 2001 Microchip Technology Inc. ...
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... LP oscillator as a clock source. Note 1: In Counter mode, the counter increments on the rising edge of the clock. 2001 Microchip Technology Inc. PIC16C781/782 EXAMPLE 6-1: TIMER1 INITIALIZATION ;* This code block will configure Timer1 for ;* Polling, Ext gate of int clk (Fosc/4), & ...
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... PIC16C781/782 6.2 Control Register T1CON Control and configuration of Timer1 is by means of the T1CON register shown in Register 6-1. Timer1 is enabled by setting the TMR1ON bit (T1CON<0>). Clearing TMR1ON stops the timer, but does not clear the Timer1 register. The TMR1CS bit (T1CON<1>) determines the Timer mode ...
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... External clock from pin RA6/OSC2/CLKOUT/T1CKI (on the rising edge Internal clock (F bit 0 TMR1ON: Timer1 On bit 1 = Enables Timer1 0 = Stops Timer1 Legend Readable bit - n = Value at POR 2001 Microchip Technology Inc. PIC16C781/782 R/W-0 R/W-0 R/W-0 T1OSCEN /4) OSC W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’ ...
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... T1CKI = 0 when TMR1 Enabled Note 1: Arrows indicate counter increments Counter mode, a falling edge must be registered by the counter prior to the first incrementing rising edge of the clock. FIGURE 6-2: TIMER1 ON THE PIC16C781/782 BLOCK DIAGRAM Set Flag bit TMR1IF on Overflow TMR1 TMR1H LP OSCILLATOR RA7/OSC1/CLKIN ...
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... Bit 5 Bit 4 Bit 3 Bit 2 T0IE INTE RBIE T0IF C2IF C1IF — — C2IE C1IE — — Preliminary PIC16C781/782 Value on: Value on Bit 1 Bit 0 POR, all other BOR RESETS INTF RBIF 0000 000X 0000 000u — TMRIF 0000 ---0 0000 ---0 — TMRIE 0000 ---0 0000 ---0 ...
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... PIC16C781/782 NOTES: DS41171A-page 60 Preliminary 2001 Microchip Technology Inc. ...
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... RB0 Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared Bit 4 Bit 3 Bit 2 Bit 1 — — VREN VROE — Preliminary PIC16C781/782 R R R/W-0 U-0 U-0 VROE — — bit Bit is unknown R Value on: Value on Bit 0 POR, ...
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... PIC16C781/782 NOTES: DS41171A-page 62 Preliminary 2001 Microchip Technology Inc. ...
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... The BGST bit (LVDCON<5> status bit indicating that the internal reference voltage bandgap has stabi- lized. No test should be performed until this bit is set. The low voltage output flag for the PLVD module is the LVDIF bit (PIR1<6>). Preliminary PIC16C781/782 and T is then available A B falls below V ...
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... DS41171A-page 64 enables this reference whenever it is enabled and pro- vides a stability bit, BGST, to indicate when it has sta- bilized. The bandgap reference is also enabled by other modules within the PIC16C781/782 as part of their operation. Other modules using the bandgap include the following: • V module R • ...
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... CASE LVDIF Enable LVD Internally Generated Reference Stable 2001 Microchip Technology Inc. PIC16C781/782 2. Ensure that PLVD interrupts are disabled (the LVDIE bit is cleared, or the GIE bit is cleared). 3. Enable the PLVD module (set the LVDEN bit in the LVDCON register). 4. Wait for the PLVD module to stabilize (the BGST bit to become set) ...
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... PIC16C781/782 REGISTER 8-1: PROGRAMMABLE LOW VOLTAGE DETECT REGISTER (LVDCON: 9Ch) U-0 — bit 7 bit 7-6 Unimplemented: Read as '0' bit 5 BGST: Internal Reference Voltage Stable Flag bit 1 = Reference is stable 0 = Reference is not stable bit 4 LVDEN: Low Voltage Detect Power Enable bit 1 = Enables PLVD, powers up LVD circuit 0 = Disables PLVD, powers down LVD circuit ...
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... Detect are shown in Table 8-1. Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 LVDEN LV3 LV2 LV1 C2IE C2IE — — — C2IF C2IF — — — Preliminary PIC16C781/782 Value on Value on: Bit 0 all other POR, BOR RESETS LV0 --00 0101 --00 0101 TMR1IE 0000 ---0 0000 ---0 TMR1IF 0000 ---0 0000 ---0 DS41171A-page 67 ...
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... PIC16C781/782 NOTES: DS41171A-page 68 Preliminary 2001 Microchip Technology Inc. ...
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... ANALOG-TO-DIGITAL CONVERTER (ADC) MODULE The 8-bit ADC module, shown in Figure 9-1, has 10 inputs in the PIC16C781/782: • 8 external channels, AN<7:0> (RA<3:0> and RB<3:0>) • 2 internal channels, V and V R DAC The ADC allows conversion of an analog input signal to a corresponding 8-bit digital value. The desired chan- nel is connected to a Sample-and-Hold by the input multiplexers ...
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... PIC16C781/782 9.1 Control Registers The ADC module has three registers. These registers are: • ADC Result Register: ADRES • ADC Control Register 0: ADCON0 • ADC Control Register 1: ADCON1 The ADCON0 register, shown in Register 9-1, controls the operations and input channel selection for the ADC module ...
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... Bit is cleared U-0 R/W-0 R/W-0 U-0 — VCFG1 VCFG0 — Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared Preliminary PIC16C781/782 R/W-x R/W-x R/W-x AD2 AD1 AD0 bit Bit is unknown U-0 U-0 U-0 — — ...
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... Analog levels on any pin that is defined as a digital input, including AN<7:0>, may cause the input buffer to consume excess supply current. TABLE 9-1: TAD vs. DEVICE OPERATING FREQUENCIES: PIC16C781/782 ADC Clock Source ( Operation ADCS1:ADCS0 2 T ...
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... To calculate the minimum acquisition time, Equation 9-1 may be used. This equation calculates the acquisition time to within ½ LSb error, assuming an 8-bit conver- sion (512 steps for the PIC16C781/782 ADC). The ½ LSb error is the maximum error allowed for the ADC to meet its specified accuracy. ...
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... PIC16C781/782 FIGURE 9-2: ANALOG INPUT MODEL ANx R S CPIN Legend input capacitance PIN V = threshold voltage leakage current at the pin due to LEAKAGE various junctions R = interconnect resistance sampling switch C = sample/hold capacitance (from DAC) HOLD 9.4 ADC Configuration and Conversion Example 9-2 demonstrates an ADC conversion. The RA0/AN0 pin is configured as the analog input ...
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... To perform an ADC conversion in SLEEP, ensure the SLEEP instruction immediately follows the instruc- tion that sets the GO/DONE bit. 2001 Microchip Technology Inc. PIC16C781/782 9.6 ADC Accuracy/Error The absolute accuracy (absolute error) specified for the ADC converter includes the sum of all contributions for: • ...
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... PIC16C781/782 9.6.1 CLOCK NOISE In systems where the device frequency is low, use of the ADC RC clock is preferred. At moderate to high fre- quencies, T should be derived from the device oscil- AD lator. T must not violate the minimum and should for preferred operation. This is because T when derived from T ...
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... RC? 1 Instruction Cycle No Yes Abort Conversion Device SLEEP? ADIF = 0 No Finish Conversion SLEEP Power-down A ADIF = 1 Wait 2T AD TABLE 9-2: REGISTERS/BITS ASSOCIATED WITH ADC, PIC16C781/782 Address Name Bit 7 Bit 6 0Bh INTCON GIE PEIE 8Ch PIE1 LVDIE ADIE 0Ch PIR1 LVDIF ADIF 1Eh ...
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... PIC16C781/782 NOTES: DS41171A-page 78 Preliminary 2001 Microchip Technology Inc. ...
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... Bit is set ’0’ = Bit is cleared R/W-0 R/W-0 R/W-0 DA6 DA5 DA4 DA3 W = Writable bit ’1’ = Bit is set ’0’ = Bit is cleared Preliminary PIC16C781/782 DAC U-0 R/W-0 R/W-0 — — DARS1 DARS0 bit 0 REF x = Bit is unknown R/W-0 R/W-0 ...
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... PIC16C781/782 10.2 Control Register The DAC module is enabled by setting the DAON bit (DACON0<7>). Bits DARS<1:0> (DACON0<1:0>) determine the volt- age reference for the DAC module. To output the DAC voltage, the (DACON0<6>) and DAON must be set. To use the DAC output internally, the appropriate reference select bits in the destination module must be set ...
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... DA6 86h TRISB RB7 RB6 9Dh ANSEL AN7 AN6 Legend unknown unchanged unimplemented, read as '0'. Shaded cells are not used for DAC conversion. 2001 Microchip Technology Inc. PIC16C781/782 FIGURE 10- FFh FEh 04h 03h 02h 01h 00h Offset error measures the first actual transition of a code versus the first ideal transition of a code ...
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... PIC16C781/782 NOTES: DS41171A-page 82 Preliminary 2001 Microchip Technology Inc. ...
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... FIGURE 11-1: OPA MODULE BLOCK DIAGRAM RA0/AN0/OPA+ RA1/AN1/OPA- RB3/AN7/OPA 2001 Microchip Technology Inc. PIC16C781/782 11.1.1 OPACON REGISTER The OPA module is enabled by setting the OPAON bit (OPACON<7>). When enabled, the OPA forces the output driver of RB3/AN7/OPA into tri-state to prevent contention between the driver and the OPA output. ...
Page 86
... PIC16C781/782 REGISTER 11-1: OPAMP CONTROL REGISTER (OPACON: 11Ch) R/W-0 OPAON CMPEN bit 7 bit 7 OPAON: OPAMP Enable bit 1 = OPAMP is enabled 0 = OPAMP is disabled bit 6 CMPEN: Comparator Mode Enable bit 1 = Comparator mode 0 = OPAMP mode bit 5-1 Unimplemented: Read as ’0’ bit 0 GBWP: Gain Bandwidth Product Select bits MHz typ ...
Page 87
... U-0 U-0 CALREF — — must not exceed OPAMP maximum common mode voltage Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared Preliminary PIC16C781/782 OPA 0 1 U-0 U-0 U-0 — — — bit Bit is unknown ...
Page 88
... PIC16C781/782 11.2 Configuration as OPAMP or Comparator The following example demonstrates calibration of the OPA module as an Operational Amplifier. EXAMPLE 11-1: CALIBRATION FOR OPAMP MODE ;* This code block will configure the OPA ;* module Amp, 2 MHz GBWP, and ;* calibrated for a common mode voltage of ;* 1.2V. Routine returns w=0 if ...
Page 89
... PORTA Data Direction Register 11Eh DAC DA7 DA6 11Fh DACON0 DAON DAOE Legend unknown unchanged unimplemented, read as '0'. Shaded cells are not used for the OPA module. 2001 Microchip Technology Inc. PIC16C781/782 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 — — — — — — — ...
Page 90
... PIC16C781/782 NOTES: DS41171A-page 88 Preliminary 2001 Microchip Technology Inc. ...
Page 91
... AN<7:4>. Note: To use AN<7:4> as analog inputs, the appropriate bits must be programmed in the ANSEL register. 2001 Microchip Technology Inc. PIC16C781/782 Setting C1R (CM1CON0<2>) selects the output of the DAC module as the reference voltage for the compara- tor. Clearing C1R selects the V AN3/V 1 pin. ...
Page 92
... PIC16C781/782 FIGURE 12-1: COMPARATOR C1 SIMPLIFIED BLOCK DIAGRAM C1CH<1:0> 2 RB0/INT/AN4 RB1/AN5/V DAC 1 RB2/AN6 2 RB3/AN7/OPA 3 C1R RA3/AN3/V 1 REF DAC FIGURE 12-2: COMPARATOR C2 SIMPLIFIED BLOCK DIAGRAM C2CH<1:0> 2 RB0/INT/AN4 RB1/AN5/V DAC C2VN 1 C2VP RB2/AN6 2 RB3/AN7/OPA 3 C2R RA2/AN2/V 2 REF DAC DS41171A-page 90 To Interrupt and PSMC Logic ...
Page 93
... Microchip Technology Inc. R-0 R/W-0 R/W-0 R/W-0 C1OE C1POL C1SP (1) output DAC 1 REF W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared Preliminary PIC16C781/782 R/W-0 R/W-0 R/W-0 C1R C1CH1 C1CH0 bit Bit is unknown DS41171A-page 91 ...
Page 94
... PIC16C781/782 12.1.2 COMPARATOR C2 CONTROL REGISTERS The CM2CON0 register is a functional copy of the CM1CON0 register described in Section 12.1.1. A sec- ond control register, CM2CON1, is also present for control of an additional synchronizing feature, as well as mirrors of both comparator outputs. 12.1.2.1 Control Register CM2CON0 The CM2CON0 register, shown in Register 12-2, con- tains the control and status bits for Comparator C2. Setting C2ON (CM2CON0< ...
Page 95
... C2VN of C2 connects to AN6 11 = C2VN of C2 connects to AN7 Note 1: C2OUT will only drive RB7/C2/PSMC1B/T1G if: (C2OE = 1) & (C2ON = 1) & (TRISB<7> & ((SMCON = 0) or ((SMCOM = 0) & (SCEN = 0))). Legend Readable bit - n = Value at POR 2001 Microchip Technology Inc. PIC16C781/782 R/W-0 R/W-0 R/W-0 C2OE C2POL C2SP (1) DAC ...
Page 96
... PIC16C781/782 12.1.2.2 Control Register CM2CON1 Comparator C2 has one additional feature: its output can be synchronized to the Timer1 clock input. Setting C2SYNC (CM2CON1<0>) synchronizes the output of Comparator 2 to the falling edge of Timer 1’s clock input (see Figure 12-1 and Register 12-3). REGISTER 12-3: ...
Page 97
... Set C2; no out MOVWF CM2CON0 ; VREF2, AN6 BSF CM2CON1,C2SYNC ; CLK sync 2001 Microchip Technology Inc. PIC16C781/782 12.2.1 EXAMPLE: C2 SYNCHRONIZED TO T1CKI In this example, Comparator C2 is configured as a nor- mal voltage comparator synchronized to the T1CKI input. A block diagram of the comparator with external connections is shown in Figure 12-2. ...
Page 98
... PIC16C781/782 FIGURE 12-4: CONFIGURATION OF COMPARATOR C1 WITH DAC RB3/AN7/OPA INPUT EXAMPLE 12-2: PROGRAMMING C1 FOR PSMC FEEDBACK ;* This code block will configure Comparator ;* C1 for normal speed and output polarity, ;* input on AN7, and Reference from the DAC BANKSEL TRISA ; Select Bank 1 BSF TRISB,RB3 ; RB3 as input ...
Page 99
... USER_ISR BANKSEL CM2CON0 ; Select Bank 2 MOVF CM2CON0,F ; Clear C2 mismatch BANKSEL PIR1 ; Select Bank 0 BCF PIR1,C1IF ; Clear C2 int USER_ISR ;*** USER INTERRUPT ROUTING ;* SWAPF STATUS_SAVE,W; Restore W & ; STATUS MOVWF STATUS SWAPF W_SAVE,F SWAPF W_SAVE,W RETFIE ; Return 2001 Microchip Technology Inc. PIC16C781/782 Preliminary DS41171A-page 97 ...
Page 100
... PIC16C781/782 12.3 Effects of RESET A RESET forces all registers to their RESET state. This disables both comparators. TABLE 12-2: REGISTERS ASSOCIATED WITH THE COMPARATOR MODULE Address Name Bit 7 Bit 6 119h CM1CON0 C1ON C1OUT 11Ah CM2CON0 C2ON C2OUT 11Bh CM2CON1 MC1OUT MC2OUT 85h TRISA ...
Page 101
... Min DC New Cycle Max D/C SC Switch C1OUT RB6/C1/ PSMC1A RB7/C2/ HIGH IMPEDANCE PSMC1B/T1G ASSUMES S1APOL=0 SMCCS Duty Cycle 4 S1APOL New S Cycle Set Dominant Max Switch C1OUT SMCCS SCEN C2OUT Preliminary PIC16C781/782 Period HIGH IMPEDANCE SCEN=1 PWM/PSM=1 SMCON=1 SMCOM=0 RB6/C1/PSMC1A RB7/C2/PSMC1B/T1G N DS41171A-page 99 ...
Page 102
... PIC16C781/782 FIGURE 13-2: PSMC MODULE IN DUAL ALTERNATING OUTPUT PWM MODE (SIMPLIFIED BLOCK DIAGRAM) F 1:1 1:2 1:4 1:8 OSC SMCCL1 SMCCL0 S0 PSMC CLK 4-bit Counter MAXDC<1:0> PSMC 2 Controller MINDC<1:0> 2 C1POL C1 C2POL C2 Comparator Module TABLE 13-1: PSMC1A OUTPUT SEQUENCE IN PWM MODE USING C1 COMPARATOR ONLY ...
Page 103
... Beginning of PWM cycle During Min Duty Cycle After Min Duty Cycle, Before Max Duty Cycle Max Duty Cycle Legend Don’t Care q = Prior State 2001 Microchip Technology Inc. C1OUT C2OUT non-zero x non-zero Inactive 1 = Active H = High Preliminary PIC16C781/782 PSMC1A Output Signal Low DS41171A-page 101 ...
Page 104
... PIC16C781/782 13.1.1 PULSE SKIP MODULATION (PSM) In PSM (Pulse Skip Modulation), the PSMC operates as a fixed duty cycle pulse generator, with its output gated by the analog feedback (see Figure 13-3). Imme- diately prior to the initiation of a pulse, the analog feed- back is sampled. If the comparator output = H, a pulse ...
Page 105
... Note: When the Slope Compensation switch is enabled (SMCOM = 0, and SCEN = 1), the S1BPOL bit has no effect (see RC Network on next page for more detail 15/16T - On - Off Preliminary PIC16C781/782 PSMC1A Output Signal Change No Change 1 0 PIC16C78X ...
Page 106
... PIC16C781/782 13.2 Control Registers The PSMC is controlled by means of two special func- tion registers: PSMCCON0 and PSMCCON1. The PSMCCON0 register (Register 13-1) contains control bits for: • Frequency of the output pulse • Minimum and maximum duty cycle in PWM mode • Fixed duty cycle in PSM mode ...
Page 107
... DC<1:0>: Duty Cycle Select bits for PSM Mode 00 = Duty cycle of 1 Duty cycle of 3 Duty cycle of 5 Duty cycle of 15/16 Legend Readable bit - n = Value at POR 2001 Microchip Technology Inc. PIC16C781/782 R/W-0 R/W-0 R/W-0 R/W-0 MINDC1 MINDC0 MAXDC1 MAXDC0 /128 ...
Page 108
... PIC16C781/782 REGISTER 13-2: PSMC CONTROL REGISTER1 (PSMCCON1: 112h) R/W-0 R/W-0 SMCON S1APOL bit 7 bit 7 SMCON: PSMC Module Enable bit 1 = PSMC module PSMC module off bit 6 S1APOL: PSMC1A Output Polarity Control bit 1 = PSMC1A output signal is asserted low 0 = PSMC1A output signal is asserted high ...
Page 109
... MAIN • OPAMP feedback filter • DAC reference 2001 Microchip Technology Inc. PIC16C781/782 The inner current loop is a pulsed current source driven by the PSMC. During the active phase of the output pulse, the inner loop builds up a current flow in inductor L1. The current monitored by the current trans- former ...
Page 110
... PIC16C781/782 FIGURE 13-5: EXAMPLE BOOST CONFIGURATION LC SWITCHING POWER SUPPLY PIC16C781/782 A PSMC SC OPA C1 DAC V REF Note: The OPAMP, Comparator and DAC must be configured, prior to enabling the PSMC to prevent unpredictable operation which may stress the power MOSFET transistors. DS41171A-page 108 +DCRAW MOSFET DRIVER ...
Page 111
... MOVWF PSMCCON0 MOVLW B’00001010’ MOVWF PSMCCON1 BSF PSMCCON1,SMCON 2001 Microchip Technology Inc. PIC16C781/782 ; Select Bank 1 ; Set RA0,1,& inputs ; Set RB1,2,3,6 & inputs ; Configure RA0, RA1, RA3, ; RB1, RB2, RB3 as analog ; Select Bank 2 ; Set DAC to safe value ; Enable DAC, output ...
Page 112
... PIC16C781/782 13.3.2 EXAMPLE BUCK LC SWITCHING POWER SUPPLY In this example, the PSMC controls the buck configura- tion switching power supply in Figure 13-6. The PSMC is configured as a typical PWM, current mode, switching power supply controller. The inner cur- rent feedback loops consist of: • ...
Page 113
... MOVWF PSMCCON0 MOVLW B’00000110’ MOVWF PSMCCON1 BSF PSMCCON1,SMCON 2001 Microchip Technology Inc. PIC16C781/782 ; Select Bank 1 ; Set RA0,1,& inputs ; Set RB1,2,3,6 & inputs ; Set AN0,1,3,5,6 & analog ; Select Bank 2 ; Set DAC to safe value ; Enable DAC, output ; and set DACREF = VDD ...
Page 114
... PIC16C781/782 FIGURE 13-6: EXAMPLE BUCK CONFIGURATION LC POWER SUPPLY PIC16C781/782 RB6/C1/PSMC1A A PSMC RB7/C2/PSMC1B/T1G B RA3/AN3 RB2/AN6 - RB3/AN7/OPA RA1/AN1/OPA- - OPA RA0/AN0/OPA+ + RB1/AN5/V V DAC REF 13.3.3 EXAMPLE MOTOR SPEED CONTROL In Figure 13-7, the PSMC acts as a speed control for a brushless DC motor. The direction of the current in the motor winding is set by feedback from a Hall effect position sensor on the motor ...
Page 115
... B’11001100’ MOVWF PSMCCON0 MOVLW B’00000010’ MOVWF PSMCCON1 BSF PSMCCON1,SMCON 2001 Microchip Technology Inc. PIC16C781/782 ; Select Bank 1 ; Set RA0,1 & inputs ; Set RB2 & inputs ; Set AN0,1,6,& analog ; Enable VR ; Select Bank 2 ; Set DAC to safe value ; Enable DAC, no output ; and set DACREF = VR ...
Page 116
... PIC16C781/782 FIGURE 13-7: EXAMPLE BRUSHLESS D.C. MOTOR CONTROL PIC16C781/782 F OSC / OPA V REF FIRMWARE FEEDBACK DAC CONTROL TIMER 1 DS41171A-page 114 H-BRIDGE DRIVER RB6/C1/PSMC1A ENABLE PHASE RB2/AN6 RB3/AN7/OPA RA0/AN0/OPA+ RA1/AN1/OPA- RA6/OSC2/CLKOUT/T1CKI Preliminary V MOTOR BRUSHLESS D.C. MOTOR HALL EFFECT SENSOR R SENSE 2001 Microchip Technology Inc. ...
Page 117
... Legend unknown unchanged unimplemented, read as '0'. Shaded cells are not used for PSMC. 2001 Microchip Technology Inc. PIC16C781/782 Placing the PIC16C781/782 into SLEEP mode will stop the main oscillator for the microcontroller. The PSMC derives its timing from the main oscillator. Therefore, operation of the PSMC will halt when the microcontrol- ler enters SLEEP mode ...
Page 118
... PIC16C781/782 NOTES: DS41171A-page 116 Preliminary 2001 Microchip Technology Inc. ...
Page 119
... Interrupt Additional information on special features is available in the PICmicro™ Mid-Range Reference Manual, (DS33023). 2001 Microchip Technology Inc. PIC16C781/782 14.1 Configuration Bits The configuration bits can be programmed (read as '0'), or left unprogrammed (read as '1'), to select various device configurations. These bits are mapped in pro- gram memory location 2007h ...
Page 120
... PIC16C781/782 REGISTER 14-1: CONFIGURATION WORD FOR PIC16C781/782 DEVICE (CONFIG:2007h BORV1 BORV0 CP bit13 bit 13-12, CP: Program Memory Code Protection bits 9 Code Protection off 0 = All program memory is protected bit 11-10 BORV<1:0>: Brown-out Reset Voltage bits 00 = PBOR set to 4. PBOR set to 4. PBOR set to 2. PBOR set to 2 ...
Page 121
... Oscillator Configurations 14.2.1 OSCILLATOR TYPES The PIC16C781/782 can be operated in eight different oscillator modes. The user can program three configu- ration bits FOSC<2:0> to select one of these eight modes: • LP Low Power Crystal • XT Crystal/Resonator • HS High Speed Crystal/Resonator • RC External Resistor and Capacitor (with and without CLKOUT) • ...
Page 122
... S and 3.25 S, nominal. 14.2.7 CLKOUT In the INTRC and RC modes, the PIC16C781/782 can be configured to provide a clock out signal by program- ming the configuration word. The oscillator frequency, divided by 4, can be used for test purposes or to syn- chronize other logic. ...
Page 123
... RESET The PIC16C781/782 devices have several different RESETS. These RESETS are grouped into two classi- fications: power-up and non power-up. The power-up type RESETS are the Power-on and Brown-out Resets, which assume the device V DD normal operating range for the device’s configuration. ...
Page 124
... RESET for as long as needed. FIGURE 14-5: EXTERNAL POWER-ON RESET CIRCUIT (FOR SLOW V RAMP PIC16C781/782 MCLR C Note 1: External Power-on Reset circuit is required only if V power-up slope is too slow. The DD diode D helps discharge the capacitor quickly when V powers down. ...
Page 125
... The WDT can be enabled either by setting the WDTE bit in the configuration register during programming setting the WDTON bit (PCON<4>). Power-up PWRTE = 1 + 1024T 1024T T OSC OSC PWRT — PWRT Preliminary PIC16C781/782 Wake-up from Brown-out SLEEP + 1024T 1024T OSC OSC T — PWRT DS41171A-page 123 ...
Page 126
... PIC16C781/782 REGISTER 14-2: POWER CONTROL REGISTER (PCON: 8Eh) U-0 — bit 7 bit 7-5 Unimplemented: Read as '0' bit 4 WDTON: WDT Software Enable bit If WDTE bit (Configuration Word <3> This bit is not writable, always reads ‘1’ If WDTE bit (Configuration Word <3> WDT is enabled ...
Page 127
... OST TIME-OUT INTERNAL RESET FIGURE 14-7: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET 2001 Microchip Technology Inc. PIC16C781/782 Program STATUS Counter Register 000h 0001 1xxx 000h 000u uuuu 000h 0001 0uuu 000h 0000 1uuu ...
Page 128
... PIC16C781/782 TABLE 14-6: INITIALIZATION CONDITION FOR ALL REGISTERS Power-On Reset or Register Brown-Out Reset W (not a mapped register) INDF TMR0 PCL STATUS FSR PORTA PORTB PCLATH INTCON PIR1 CALCON TMR1L TMR1H T1CON PSMCCON0 PSMCCON1 CM1CON0 CM2CON0 CM2CON1 OPACON ADRES ADCON0 OPTION_REG TRISA TRISB ...
Page 129
... PWRT TIME-OUT OST TIME-OUT INTERNAL RESET FIGURE 14-9: SLOW V RISE TIME (MCLR TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET Note 1: This time depends on the oscillator circuit used. 2001 Microchip Technology Inc. PIC16C781/782 T PWRT T OST ) PWRT (1) T OST Preliminary ) ...
Page 130
... PIC16C781/782 14.9 Interrupts The devices have up to eight sources of interrupt. The interrupt control register (INTCON) records individual interrupt requests in flag bits. It also has individual and global interrupt enable bits. Note: Individual interrupt flag bits are set, regard- less of the status of their corresponding mask bit or the GIE bit. A global interrupt enable bit, GIE (INTCON< ...
Page 131
... Note: The W_TEMP, STATUS_TEMP PCLATH_TEMP are defined in the com- mon RAM area (70h - 7Fh) to avoid regis- ter bank switching during context save and restore. 2001 Microchip Technology Inc. PIC16C781/782 EXAMPLE 14-1: SAVING STATUS, W, AND PCLATH REGISTERS #define W_TEMP #define STATUS_TEMP #define ...
Page 132
... PIC16C781/782 FIGURE 14-11: WATCHDOG TIMER BLOCK DIAGRAM From TMR0 Clock Source (Figure 5-2) (2) WDTE WDT Timer (3) WDTON Note 1: PSA and PS<2:0> are bits in the OPTION_REG register. 2: WDTE bit in the configuration word. 3: WDTON bit in the PCON register. TABLE 14-7: SUMMARY OF WATCHDOG TIMER REGISTERS ...
Page 133
... SLEEP instruction completes. To determine whether a SLEEP instruction executed, test the PD bit. If the PD bit is set, the SLEEP instruction was executed as a NOP. To ensure that the WDT is cleared, a CLRWDT instruc- tion should be executed before a SLEEP instruction. Preliminary PIC16C781/782 DS41171A-page 131 ...
Page 134
... PIC16C781/782 FIGURE 14-12: WAKE-UP FROM SLEEP THROUGH INTERRUPT OSC1 (3) CLKOUT INT pin INTF flag (INTCON<1>) GIE bit (INTCON<7>) INSTRUCTION FLOW PC PC PC+1 Instruction Inst( Inst(PC) = SLEEP Fetched Instruction SLEEP Inst( Executed Note 1024T (drawing not to scale). This delay applies to LP, XT and HS modes only. ...
Page 135
... Byte-oriented operations • Bit-oriented operations • Literal and control operations 2001 Microchip Technology Inc. PIC16C781/782 All instructions are executed within one single instruc- tion cycle, unless a conditional test is true or the pro- gram counter is changed as a result of an instruction. In this case, the execution takes two instruction cycles with the second cycle executed as a NOP ...
Page 136
... PIC16C781/782 TABLE 15-2: PIC16CXXX INSTRUCTION SET Mnemonic, Description Operands BYTE-ORIENTED FILE REGISTER OPERATIONS ADDWF f, d Add W and f ANDWF f, d AND W with f CLRF f Clear f CLRW - Clear W COMF f, d Complement f DECF f, d Decrement f DECFSZ f, d Decrement f, Skip if 0 INCF f, d Increment f INCFSZ f, d Increment f, Skip if 0 ...
Page 137
... Operation: (W) .AND. (k) (W) Status Affected: Z Description: The contents of W register are AND’ed with the eight bit literal 'k'. The result is placed in the W register. 2001 Microchip Technology Inc. PIC16C781/782 ANDWF AND W with f Syntax: [label] ANDWF Operands Operation: (W) .AND. (f) Status Affected: Z Description: AND the W register with register 'f' ...
Page 138
... PIC16C781/782 BTFSC Bit Test, Skip if Clear Syntax: [label] BTFSC f,b Operands 127 Operation: skip if (f<b> Status Affected: None Description: If bit ’b’ in register ’f’ is ’1’, the next instruction is executed. If bit ’b’, in register ’f’, is ’0’, the next instruction is discarded, and ...
Page 139
... Status Affected: Z Description: The contents of register ’f’ are incremented. If ’d’ the result is placed in the W register. If ’d’ the result is placed back in reg- ister ’f’. 2001 Microchip Technology Inc. PIC16C781/782 INCFSZ Increment f, Skip if 0 Syntax: [ label ] Operands [0,1] ...
Page 140
... PIC16C781/782 MOVF Move f Syntax: [ label ] MOVF f,d Operands 127 d [0,1] Operation: (f) (destination) Status Affected: Z Description: The contents of register f are moved to a destination dependant upon the status des- tination is W register the destination is file register f itself useful to test a file register, since status flag Z is affected. ...
Page 141
... Operation (W) W) Status Affected: C, DC, Z Description: The W register is subtracted (2’s complement method) from the eight-bit literal 'k'. The result is placed in the W register. 2001 Microchip Technology Inc. PIC16C781/782 SUBWF Subtract W from f Syntax: [ label ] Operands 127 d [0,1] Operation: (f) - (W) Status Affected: C, DC, Z Description: Subtract (2’ ...
Page 142
... PIC16C781/782 XORWF Exclusive OR W with f Syntax: [label] XORWF Operands 127 d [0,1] Operation: (W) .XOR. (f) destination) Status Affected: Z Description: Exclusive OR the contents of the W register with register ’f’. If ’d’ the result is stored in the W register. If ’d’ the result is stored back in register ’f’. ...
Page 143
... Customizable toolbar and key mapping • A status bar • On-line help 2001 Microchip Technology Inc. PIC16C781/782 The MPLAB IDE allows you to: • Edit your source files (either assembly or ‘C’) • One touch assemble (or compile) and download to PICmicro emulator and simulator tools (auto- matically updates all project information) • ...
Page 144
... PIC16C781/782 16.4 MPLINK Object Linker/ MPLIB Object Librarian The MPLINK object linker combines relocatable objects created by the MPASM assembler and the MPLAB C17 and MPLAB C18 C compilers. It can also link relocatable objects from pre-compiled libraries, using directives from a linker script. The MPLIB object librarian is a librarian for pre- compiled code to be used with the MPLINK object linker ...
Page 145
... Some of the features include a RS-232 interface, push button switches, a potentiometer for simulated analog input, a serial EEPROM to demonstrate usage of the I and separate headers for connection to an LCD module and a keypad. and Preliminary PIC16C781/782 PIC16C62X, PIC16C71, PIC16C8X, that supports the PIC16C62, ...
Page 146
... PIC16C781/782 16.13 PICDEM 3 Low Cost PIC16CXXX Demonstration Board The PICDEM 3 demonstration board is a simple dem- onstration board that supports the PIC16C923 and PIC16C924 in the PLCC package. It will also support future 44-pin PLCC microcontrollers with an LCD Mod- ule. All the necessary hardware and software is included to run the basic demonstration programs ...
Page 147
... Debugger Programmers Kits Preliminary PIC16C781/782 á á á á á á á á á Eval and Boards Demo DS41171A-page 145 ...
Page 148
... PIC16C781/782 NOTES: DS41171A-page 146 Preliminary 2001 Microchip Technology Inc. ...
Page 149
... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 2001 Microchip Technology Inc. (except V , MCLR and RA4) ................................... -0. pins............................................................................................... ± 0 pins ............................................................................................... ± 0 .................................................................................................... ± > V ............................................................................................. ± DIS Preliminary PIC16C781/782 + 0 {( DS41171A-page 147 ). ...
Page 150
... PIC16C781/782 FIGURE 17-1: PIC16C781/782 VOLTAGE-FREQUENCY GRAPH, -40 C 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 0 Note 1: The shaded region indicates the permissible combinations of voltage and frequency. FIGURE 17-2: PIC16LC781/782 VOLTAGE-FREQUENCY GRAPH, -40 C 5.5 4.5- 4 (Volts) 2.7 0 Note 1: The shaded region indicates the permissible combinations of voltage and frequency. ...
Page 151
... DC Characteristics: Power Supply TABLE 17-1: DC CHARACTERISTICS: PIC16C781/782, PIC16LC781/782 (INDUSTRIAL) DC CHARACTERISTICS Param Sym Characteristic No. D001 V Supply Voltage DD D001A V Supply Voltage (PIC16LC781/782) DD D002* V RAM Data Retention DR (1) Voltage D003 V V Start Voltage to POR DD ensure internal Power-on Reset signal D004 Rise Rate to ensure internal ...
Page 152
... PIC16C781/782 17.2 DC Characteristics: Input/Output Pins TABLE 17-2: DC CHARACTERISTICS: PIC16C781/782, PIC16LC781/782 (INDUSTRIAL) DC CHARACTERISTICS Param Sym Characteristic No. Input Low Voltage V I/O ports: IL D030 with TTL buffer D030A D031 with Schmitt Trigger buffer D032 MCLR D033 OSC1 (in XT, HS, LP and EC) Input High Voltage V I/O ports: ...
Page 153
... AC Characteristics: PIC16C781/782 (Industrial) 17.3.1 TIMING PARAMETER SYMBOLOGY The timing parameter symbols have been created following one of the following formats: 1. TppS2ppS 2. TppS T F Frequency Lowercase letters (pp) and their meanings CLKOUT dt Data in io I/O port mc MCLR Uppercase letters and their meanings Fall ...
Page 154
... DS41171A-page 152 20, 21 Min — — — — — 0.25T + — PIC16C781/782 100 PIC16LC781/782 200 0 PIC16C781/782 — PIC16LC781/782 — — PIC16C781/782 PIC16LC781/782 — OSC Preliminary new value Typ† Max Units Conditions 75 200 ns (Note 1) 75 200 ns (Note 1) 35 100 ns (Note 1) 35 100 ...
Page 155
... All specified values are Preliminary PIC16C781/782 Units Conditions MHz XT osc mode MHz EC osc mode MHz HS osc mode kHz LP osc mode MHz XT osc mode MHz HS osc mode ...
Page 156
... PIC16C781/782 TABLE 17-5: INTERNAL RC OSCILLATOR CALIBRATED FREQUENCIES PIC16C781/782, PIC16LC781/782 Standard Operating Conditions (unless otherwise specified) AC Characteristics Operating Temperature –40×C Operating Voltage V Parameter Sym No. Internal Calibrated RC Frequency Internal Calibrated RC * These parameters are characterized but not tested. Note 1: Data in the Typical (“Typ”) column unless otherwise stated. These parameters are for design guidance only and are not tested ...
Page 157
... Note 1: Only if Power-up Timer is enabled. If Timer is disabled, time-out 2001 Microchip Technology Inc. Min Typ† 2 — — 1024 T OSC 28 72 — — 100 — BOR Preliminary PIC16C781/782 Max Units Conditions — 5V, -40°C to +85° 5V, -40°C to +85°C DD — — OSC1 period OSC ...
Page 158
... PIC16C781/782 FIGURE 17-9: TIMER0 AND TIMER1 EXTERNAL CLOCK TIMINGS RA4/T0CKI RA6/OSC2/CLKOUT/T1CKI TMR0 or TMR1 Note: Refer to Figure 17-3 for load conditions. DS41171A-page 156 Preliminary 48 2001 Microchip Technology Inc. ...
Page 159
... CY PIC16C781/782 15 — PIC16C781/782 30 — 0.5Tcy + 20 — PIC16LC781/782 15 — PIC16LC781/782 30 — 0. — CY PIC16C781/782 15 — PIC16C781/782 30 — 0. — CY PIC16LC781/782 15 — PIC16LC781/782 30 — PIC16C781/782 Greater of: — PIC16C781/782 60 — PIC16LC781/782 Greater of: — PIC16C781/782 60 — DC — 2T — OSC Preliminary Max Units Conditions — ns Must also meet parameter 42 — ...
Page 160
... PIC16C781/782 17.4 Operational Amplifier TABLE 17-8: DC CHARACTERISTICS: OPERATIONAL AMPLIFIER (OPA) DC CHARACTERISTICS Param Parameters No. Input Offset Voltage Input Offset Voltage Input Offset Voltage Input Offset Voltage Input Current and Impedance Input Bias Current Input Offset Bias Current Common Mode Common Mode Input Range ...
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... T TBD TBD Z — TBD ON — T TBD TBD ON — TBD — degrees M — TBD — degrees M SR — TBD — — SR TBD — Preliminary PIC16C781/782 = 25°C, VCM = V / OUT DD Units Conditions kHz V = 5V, GBWP = 0 DD MHz V = 5V, GBWP = 5V, GBWP = GBWP = 5V, GWBP = 5V, GBWP = 0 ...
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... PIC16C781/782 17.5 Comparators TABLE 17-10: DC CHARACTERISTICS: VOLTAGE COMPARATORS C1 AND C2 DC CHARACTERISTICS Param Parameters No. Input Offset Voltage Input Current and Impedance Input Bias Current Input Offset Bias Current Common Mode Common Mode Input Range Common Mode Rejection Open Loop Gain DC Open Loop Gain ...
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... Slew Rate Settling Time Turn On Time Note 1: Data in ‘Typ’ column is at 5V, 25° C unless otherwise stated. These parameters are for design guidance only and are not tested. 2001 Microchip Technology Inc. PIC16C781/782 Standard Operating Conditions (unless otherwise stated 2.7V to 5.5V 25°C DD ...
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... PIC16C781/782 17.7 Analog Peripherals Characteristics 17.7.1 BANDGAP VOLTAGE Bandgap voltage is used as the reference voltage in the PBOR, PLVD, Auto Calibration, and VR modules FIGURE 17-10: BANDGAP START-UP TIME V BGAP Enable Bandgap Bandgap Stable TABLE 17-14: BANDGAP START-UP TIME Parameter Sym Characteristic No. 36* T Bandgap start-up time ...
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... Preliminary PIC16C781/782 T +85°C for Industrial A Units Conditions V — V — V — V — V — V — V — V — V — V — ...
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... PROGRAMMABLE BROWN-OUT RESET MODULE DC CHARACTERISTICS: PBOR Standard Operating Conditions (unless otherwise stated): DC CHARACTERISTICS Operating temperature-40°C T Operating voltage V Param Characteristic No. D005* BOR Voltage BORV<1:0> BORV<1:0> BORV<1:0> BORV<1:0> TABLE 17-18: ADC CONVERTER CHARACTERISTICS PIC16C781/782 Param Sym Characteristic No. A01 N Resolution R A02 E Absolute Error ABS A03 ...
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... Typ† PIC16C781/782 2.0 4.0 PIC16LC781/782 TBD TBD (1) — 9 — — T /2§ OSC sample time 1.5§ — cycle. CY Preliminary PIC16C781/782 NEW_DATA CONVERSION COMPLETE Max Units Conditions 6.0 µs ADC RC mode TBD µs — — s — s The minimum time is the ampli- fier settling time. This may be used if the " ...
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... PIC16C781/782 NOTES: DS41171A-page 166 Preliminary 2001 Microchip Technology Inc. ...
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... Max or Maximum represents the mean +3 over the temperature range of -40°C to 85°C. Min or Minimum represents the mean -3 over the tem- perature range of -40°C to 85°C. Graphs and Tables are not available at this time. 2001 Microchip Technology Inc. PIC16C781/782 DD Preliminary DS41171A-page 167 ...
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... PIC16C781/782 NOTES: DS41171A-page 168 Preliminary 2001 Microchip Technology Inc. ...
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... For PICmicro device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. 2001 Microchip Technology Inc. PIC16C781/782 Example PIC16C781 -I/SS 0107017 Example Example PIC16C781/SO 0110017 Example PIC16C781-I/P 0110017 Preliminary PIC16C781 /JW 0105017 DS41171A-page 169 ...
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... PIC16C781/782 20-Lead Plastic Shrink Small Outline (SS) – 209 mil, 5.30 mm (SSOP Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width Overall Length Foot Length Lead Thickness Foot Angle Lead Width Mold Draft Angle Top ...
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... CERDIP Windowed Diagram not available at this time. 2001 Microchip Technology Inc. PIC16C781/782 Preliminary DS41171A-page 171 ...
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... PIC16C781/782 20-Lead Plastic Small Outline (SO) – Wide, 300 mil (SOIC Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top ...
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... L .120 .130 .140 c .008 .012 .015 B1 .055 .060 .065 B .014 .018 .022 eB .310 .370 .430 Preliminary PIC16C781/782 MILLIMETERS MIN NOM MAX 20 2.54 3.56 3.94 4.32 2.92 3.30 3.68 0.38 7.49 7.87 8.26 6.10 6.35 6.60 26.04 26.24 26.42 3.05 3.30 3 ...
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... PIC16C781/782 NOTES: DS41171A-page 174 Preliminary 2001 Microchip Technology Inc. ...
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... Auto Calibration Module.............................................. 85 Comparator C1 Simplified........................................... 90 Comparator C2 Simplified........................................... 90 DAC Converter............................................................ 80 Low Voltage Detect ..................................................... 64 On-Chip Reset Circuit ............................................... 121 OPA Module................................................................ 83 PIC16C781 ................................................................... 5 PIC16C782 ................................................................... 6 PSMC Module in Dual Alternating Output PWM Mode ............................................................... 100 PSMC Module in Single Output PSM Mode ............. 102 PSMC Module in Single Output PWM Mode .............. 99 RA0/AN0/OPA+ Pin .................................................... 27 RA1/AN1/OPA- Pin ...
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... PIC16C781/782 E EC Mode ........................................................................... 119 Effect of RESET on Core Registers .................................... 24 Summary..................................................................... 24 Effects of RESET ................................................................ 52 Electrical Characteristics................................................... 147 Errata .................................................................................... 3 Examples DAC Configuration ...................................................... 81 OPAMP Calibration Mode Configuration..................... 86 Peripheral Configuration ........................................... 113 PSMC Configuration ................................................. 109 PSMC Configuration Example for a Buck Mode Switching Power Supply ................................. 111 Window Comparator ................................................... 97 External Power-on Reset Circuit ....................................... 122 F Firmware Instructions ...
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... DAC RB2/AN6 ....................................................................... 8 RB3/AN7/OPA............................................................... 8 RB4 ............................................................................... 8 RB5 ............................................................................... 8 RB6/C1/PSMC1A.......................................................... 8 RB7/C2/PSMC1B/T1G.................................................. 9 V ............................................................................... ................................................................................ 9 SS Pinout Description PIC16C781/782 ............................................................ 8 2001 Microchip Technology Inc. PIC16C781/782 PIR1 Register ADIF Bit ...................................................................... 21 C1IF Bit....................................................................... 21 C2IF Bit....................................................................... 21 LVDIF Bit .................................................................... 21 TMR1IF Bit ................................................................. 21 PLVD DC Characteristics.................................................... 163 PLVD Example ................................................................... 67 PMCON1 ............................................................................ 47 PMDATH and PMDATL Registers...................................... 47 PMR Associated Register Summary ...
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... PIC16C781/782 Program Memory Read (PMR) ........................................... 47 Program Memory Read Cycle Execution ............................ 50 Programmable Brown-out Reset (PBOR) ................. 121, 122 Programmable Low Voltage Detect Module (PLVD).................................................................... 63 Control Register .......................................................... 63 Effects of a RESET ..................................................... 67 Operation .................................................................... 64 Operation During SLEEP ............................................ 67 Programmable Switch Mode Controller (PSMC)................. 99 Programming C1 for PSMC Feedback................................ 96 Programming, Device Instructions .................................... 133 PSMC Associated Registers ...
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... Timer1 Incrementing Edge.................................................. 58 Timer1 Initialization ............................................................. 55 Timer1 Interrupt .................................................................. 59 Timer1 Module Timer/Counter ............................................ 55 Timer1 Module with Gate Control ....................................... 55 Timer1 Operation ................................................................ 55 Timer1 Oscillator for the PIC16C781/782 ........................... 59 Timing Diagrams ADC Conversion ....................................................... 165 Brown-out Reset ....................................................... 154 CLKOUT and I/O....................................................... 152 External Clock........................................................... 153 External Clock Timing ............................................... 152 RESET, Watchdog Timer, Oscillator Start-up Timer and Power-up Timer ...
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... PIC16C781/782 NOTES: DS41171A-page 180 Preliminary 2001 Microchip Technology Inc. ...
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... Conferences for products, Development Sys- tems, technical information and more • Listing of seminars and events 2001 Microchip Technology Inc. PIC16C781/782 Systems Information and Upgrade Hot Line The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip’ ...
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... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: PIC16C781/782 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this data sheet easy to follow? If not, why? 4 ...
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... Register on our web site (www.microchip.com/cn) to receive the most current information on our products. 2001 Microchip Technology Inc. PIC16C781/782 XXX Examples: Pattern a) PIC16C781-I/P Industrial Temp., Plastic DIP package, V normal b) PIC16LC781-I/SS Industrial Temp., SSOP package, extended c) PIC16C781-I/SOT Industrial Temp., SOIC package, Tape and Reel, V normal Preliminary limits DD V limits DD DD limits DS41171A-page 183 ...
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... Korea Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5934 Singapore Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore, 188980 Tel: 65-334-8870 Fax: 65-334-8850 Taiwan Microchip Technology Taiwan 11F-3, No. 207 ...