PIC16F506T-I/SL Microchip Technology, PIC16F506T-I/SL Datasheet - Page 5
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PIC16F506T-I/SL
Manufacturer Part Number
PIC16F506T-I/SL
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,14PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC12F510-ISN.pdf
(124 pages)
2.PIC16F506-ISL.pdf
(12 pages)
3.PIC16F506-ISL.pdf
(8 pages)
4.PIC16F506-ISL.pdf
(22 pages)
Specifications of PIC16F506T-I/SL
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
11
Program Memory Size
1.5KB (1K x 12)
Program Memory Type
FLASH
Ram Size
67 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
67 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 3 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F506T-I/SL
Manufacturer:
ROHM
Quantity:
400 000
Part Number:
PIC16F506T-I/SL
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
3.1.2.1
After receiving this command, the chip will load in a
14-bit “data word” when 16 cycles are applied, as
described previously. Because this is a 12-bit core, the
two MSbs of the data word are ignored. A timing
diagram for the Load Data command is shown in
Figure 3-2.
FIGURE 3-2:
3.1.2.2
After receiving this command, the chip will transmit
data bits out of the program memory (user or
configuration) currently addressed, starting with the
second rising edge of the clock input. The data pin will
go into Output mode on the second rising clock edge,
and it will revert to Input mode (high-impedance) after
the 16th rising edge. Because this is a 12-bit core, the
two MSbs of the 14-bit word will be read as ‘0’s.
If the program memory is code-protected (CP = 0),
portions of the program memory will be read as zeros.
See Section 5.0 “Code Protection” for details.
FIGURE 3-3:
2010 Microchip Technology Inc.
ICSPCLK
ICSPDAT
ICSPCLK
ICSPDAT
Load Data For Program Memory
Read Data From Program Memory
1
1
LOAD DATA COMMAND (PROGRAM/VERIFY)
READ DATA FROM PROGRAM MEMORY COMMAND
0
0
1
T
SET
2
0
1
2
1
1
T
3
SET
T
0
3
HLD
Input
1
T
1
HLD
4
0
0
4
1
5
5
x
x
T
DLY
6
x
6
x
T
1
T
T
DLY
DLY
DLY
2
2
1
1
strt_bit
1
strt_bit
2
2
LSb
LSb
T
3
T
DLY
SET
3
-+T
3
1
HLD
4
4
1
Output
PIC16F506
5
5
15
MSb
15
DS41258C-page 5
MSb
16
stp_bit
16
stp_bit
Input