PIC16F689-E/ML Microchip Technology, PIC16F689-E/ML Datasheet - Page 208
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,20PIN,PLASTIC](/photos/6/64/66481/c04-126_ml_sml.jpg)
PIC16F689-E/ML
Manufacturer Part Number
PIC16F689-E/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F690DM-PCTLHS.pdf
(306 pages)
3.PIC16F677-IP.pdf
(2 pages)
4.PIC16F677-IP.pdf
(16 pages)
Specifications of PIC16F689-E/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
18
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PIN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F690DM-PCTLHS PDF datasheet #2
- PIC16F677-IP PDF datasheet #3
- PIC16F677-IP PDF datasheet #4
- Current page: 208 of 306
- Download datasheet (6Mb)
PIC16F631/677/685/687/689/690
TABLE 14-4:
DS41262E-page 206
TRISB
TRISC
PIE1
PIE2
PCON
OSCCON
OSCTUNE
PR2
SSPADD
SSPMSK
SSPSTAT
WPUA
IOCA
WDTCON
TXSTA
SPBRG
SPBRGH
BAUDCTL
ADRESL
ADCON1
EEDAT
EEADR
EEDATH
EEADRH
WPUB
IOCB
VRCON
CM1CON0
CM2CON0
CM2CON1
ANSEL
ANSELH
EECON1
EECON2
PSTRCON
SRCON
Legend:
Note 1:
Register
2:
3:
4:
5:
6:
(6)
u = unchanged, x = unknown, — = unimplemented bit, reads as ‘0’, q = value depends on condition.
If V
One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h).
See Table 14-5 for Reset value for specific condition.
If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.
Accessible only when SSPM<3:0> = 1001.
DD
goes too low, Power-on Reset will be activated and registers will be affected differently.
INITIALIZATION CONDITION FOR REGISTER (CONTINUED)
86h/186h
87h/187h
Address
19EH
10Ch
10Dh
10Eh
10Fh
11Ah
11Bh
11Eh
18Ch
18Dh
19Dh
115h
116h
118h
119h
11Fh
8Ch
8Dh
8Eh
8Fh
9Ah
9Bh
9Eh
9Fh
90h
92h
93h
93h
94h
95h
96h
97h
98h
99h
Power-on Reset
1111 ----
1111 1111
-000 0000
0000 ----
--01 --0x
-110 q000
---0 0000
1111 1111
0000 0000
---- ----
0000 0000
--11 -111
--00 0000
---0 1000
0000 0010
0000 0000
0000 0000
01-0 0-00
xxxx xxxx
-000 ----
0000 0000
0000 0000
--00 0000
---- 0000
1111 ----
0000 ----
0000 0000
0000 -000
0000 -000
00-- --00
1111 1111
---- 1111
x--- x000
---- ----
---0 0001
0000 00--
WDT Reset (Continued)
Brown-out Reset
--0u --uq
MCLR Reset
1111 ----
1111 1111
-000 0000
0000 ----
-110 q000
---u uuuu
1111 1111
1111 1111
1111 1111
1111 1111
--11 -111
--00 0000
---0 1000
0000 0010
0000 0000
0000 0000
01-0 0-00
uuuu uuuu
-000 ----
0000 0000
0000 0000
--00 0000
---- 0000
1111 ----
0000 ----
0000 0000
0000 -000
0000 -000
00-- --10
1111 1111
---- 1111
u--- q000
---- ----
---0 0001
0000 00--
1, 5)
(1)
© 2008 Microchip Technology Inc.
through WDT Time-out
Wake-up from Sleep
Wake-up from Sleep
through Interrupt
uuuu ----
uuuu uuuu
-uuu uuuu
uuuu uuuu
--uu --uu
-uuu uuuu
---u uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
---u uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uu-u u-uu
uuuu uuuu
-uuu ----
uuuu uuuu
uuuu uuuu
--uu uuuu
---- uuuu
uuuu ----
uuuu ----
uuuu uuuu
uuuu -uuu
uuuu -uuu
uu-- --uu
uuuu uuuu
---- uuuu
---- uuuu
---- ----
---u uuuu
uuuu uu--
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