PIC16F72-E/SP Microchip Technology, PIC16F72-E/SP Datasheet - Page 20

• Manufacturer Part Number: PIC16F72-E/SP
• Description: 28 PIN, 3.5KB STD FLASH, 128 RAM, 22 I/O,
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F72-E/SP

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C, SPI, SSP
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 5 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC16F72
2.3
The program counter (PC) specifies the address of the
instruction to fetch for execution. The PC is 13-bits
wide. The low byte is called the PCL register. This reg-
ister is readable and writable. The high byte is called
the PCH register. This register contains the PC<12:8>
bits and is not directly readable or writable. All updates
to the PCH register go through the PCLATH register.
FIGURE 2-3:
DS39597C-page 18
PCL and PCLATH
Example 1 - Instruction with PCL as destination
Example 2 - GOTO Instruction
Example 3 - CALL Instruction
Example 4 - RETURN, RETFIE, or RETLW Instruction
Note: PCLATH is not updated with the contents of PCH.
LOADING OF PC IN DIFFERENT SITUATIONS
PC
PC
PC
PC
12
12
2
12
12
2
11 10
11 10
11 10
5
PCH
PCLATH<4:3>
PCH
PCH
PCLATH<4:3>
PCH
PCLATH
PCLATH
PCLATH
PCLATH<4:0>
8
8 7
8 7
PCLATH
8
7
7
PCL
PCL
PCL
PCL
11
11
11
8
ALU result
0
0
0
0
13
13
Opcode <10:0>
Opcode <10:0>
Opcode <10:0>
Figure 2-3 shows the four situations for the loading of
the PC.
• Example 1 shows how the PC is loaded on a write
• Example 2 shows how the PC is loaded during a
• Example 3 shows how the PC is loaded during a
• Example 4 shows how the PC is loaded during
to PCL (PCLATH<4:0> → PCH).
GOTO instruction (PCLATH<4:3> → PCH).
CALL instruction (PCLATH<4:3> → PCH), with
the PC loaded (PUSH’d) onto the Top-of-Stack.
one of the return instructions, where the PC is
loaded (POP’d) from the Top-of-Stack.
Stack (13-bits x 8)
Stack (13-bits x 8)
Stack (13-bits x 8)
Stack (13-bits x 8)
Top-of-Stack
Top-of-Stack
Top-of-Stack
Top-of-Stack
© 2007 Microchip Technology Inc.