PIC16F767-E/ML Microchip Technology, PIC16F767-E/ML Datasheet - Page 327

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC

PIC16F767-E/ML

Manufacturer Part Number
PIC16F767-E/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F767-E/ML

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 17-35: Bus Collision During Start Condition (SDA only)
Figure 17-36: Bus Collision During Start Condition (SCL = 0)
1997 Microchip Technology Inc.
SDA
SCL
SEN
S
BCLIF
SSPIF
SDA
SCL
SEN
S
BCLIF
SSPIF
'0'
'0'
SCL = 0 before BRG time out,
Bus collision occurs, Set BCLIF.
Set SEN, enable start
sequence if SDA = 1, SCL = 1
condition if SDA = 1, SCL=1
Set SEN, enable start
SDA sampled low before
START condition.
S bit and SSPIF set because
SDA = 0, SCL = 1
. Set BCLIF,
SDA goes low before the SEN bit is set.
S bit and SSPIF set because
SDA = 0, SCL = 1
SDA = 0, SCL = 1
Set BCLIF.
T
BRG
Preliminary
T
BRG
SSPIF and BCLIF are
cleared in software.
SEN cleared automatically because of bus collision.
SSP module reset into idle state.
SCL = 0 before SDA = 0,
Bus collision occurs, Set BCLIF.
Section 17. MSSP
SSPIF and BCLIF are
cleared in software.
Interrupts cleared
in software.
'0'
'0'
DS31017A-page 17-51
17

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