PIC16F873-04E/SO Microchip Technology, PIC16F873-04E/SO Datasheet - Page 278
PIC16F873-04E/SO
Manufacturer Part Number
PIC16F873-04E/SO
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F873-04SO.pdf
(218 pages)
4.PIC16F873-04SO.pdf
(5 pages)
5.PIC16F873-04SO.pdf
(5 pages)
6.PIC16F873-04SO.pdf
(4 pages)
Specifications of PIC16F873-04E/SO
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC16F87304E/SO
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F873-04SO PDF datasheet #3
- PIC16F873-04SO PDF datasheet #4
- PIC16F873-04SO PDF datasheet #5
- PIC16F873-04SO PDF datasheet #6
- Current page: 278 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
17.1
SPI is a trademark of Motorola Corporation.
I
DS31017A-page 17-2
2
C is a trademark of Philips Corporation.
Introduction
The Master Synchronous Serial Port (MSSP) module is a serial interface useful for communicat-
ing with other peripheral or microcontroller devices. These peripheral devices may be serial
EEPROMs, shift registers, display drivers, A/D converters, etc. The MSSP module can operate
in one of two modes:
• Serial Peripheral Interface (SPI™)
• Inter-Integrated Circuit (I
Figure 17-1
the block diagrams for the two different I
Figure 17-1:
- Full Master Mode
- Slave mode (with general address call)
shows a block diagram for the SPI mode, while
SPI Mode Block Diagram
SDO
SCK
SDI
SS
2
C™)
Preliminary
Read
SS Control
SMP:CKE
Select
Edge
Enable
bit0
Select
2
Edge
C modes of operation.
SSPBUF reg
Data to TX/RX in SSPSR
TRIS bit
2
SSPM3:SSPM0
SSPSR reg
Clock Select
4
2
shift clock
Prescaler
Write
4, 16, 64
Figure
TMR2 output
data bus
Internal
2
1997 Microchip Technology Inc.
17-2, and
T
OSC
Figure 17-3
show
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