PIC16F874A-E/L Microchip Technology, PIC16F874A-E/L Datasheet - Page 308
PIC16F874A-E/L
Manufacturer Part Number
PIC16F874A-E/L
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F873A-ISO.pdf
(234 pages)
5.PIC16F873A-ISO.pdf
(6 pages)
6.PIC16F873A-ISO.pdf
(4 pages)
7.PIC16F873A-ISO.pdf
(6 pages)
8.PIC16F873A-ISO.pdf
(4 pages)
9.PIC16F873A-ISO.pdf
(22 pages)
Specifications of PIC16F874A-E/L
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA16XL441 - ADAPTER DEVICE ICE 44PLCC309-1040 - ADAPTER 44-PLCC ZIF TO 40-DIP309-1039 - ADAPTER 44-PLCC TO 40-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F874A-E/L
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16C770-ISO PDF datasheet #3
- PIC16F873A-ISO PDF datasheet #4
- PIC16F873A-ISO PDF datasheet #5
- PIC16F873A-ISO PDF datasheet #6
- PIC16F873A-ISO PDF datasheet #7
- PIC16F873A-ISO PDF datasheet #8
- PIC16F873A-ISO PDF datasheet #9
- Current page: 308 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
17.4.9
17.4.9.1
DS31017A-page 17-32
I
WCOL Status Flag
2
C Master Mode Start Condition Timing
To initiate a START condition the user sets the start condition enable bit, SEN (SSPCON2<0>).
If the SDA and SCL pins are sampled high, the baud rate generator is re-loaded with the contents
of SSPADD<6:0>, and starts its count. If SCL and SDA are both sampled high when the baud
rate generator times out (T
low while SCL is high is the START condition, and causes the S bit (SSPSTAT<3>) to be set. Fol-
lowing this, the baud rate generator is reloaded with the contents of SSPADD<6:0> and resumes
its count. When the baud rate generator times out (T
automatically cleared by hardware, the baud rate generator is suspended leaving the SDA line
held low, and the START condition is complete.
If the user writes the SSPBUF when an START sequence is in progress, then WCOL is set and
the contents of the buffer are unchanged (the write doesn’t occur).
Figure 17-20: First Start Bit Timing
Note:
Note:
Write to SEN bit occurs here.
If at the beginning of START condition the SDA and SCL pins are already sampled
low, or if during the START condition the SCL line is sampled low before the SDA
line is driven low, a bus collision occurs, the Bus Collision Interrupt Flag,BCLIF, is
set, the START condition is aborted, and the I
Because queueing of events is not allowed, writing to the lower 5 bits of SSPCON2
is disabled until the START condition is complete.
SDA
SCL
BRG
Preliminary
), the SDA pin is driven low. The action of the SDA being driven
SDA = 1,
SCL = 1
T
BRG
Set S bit (SSPSTAT<3>)
S
T
BRG
At completion of start bit,
Hardware clears SEN bit
BRG
and sets SSPIF bit
2
) the SEN bit (SSPCON2<0>) will be
C module is reset into its IDLE state.
T
Write to SSPBUF occurs here
BRG
1st Bit
1997 Microchip Technology Inc.
T
BRG
2nd Bit
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