PIC16HV785-E/ML Microchip Technology, PIC16HV785-E/ML Datasheet - Page 10

• Manufacturer Part Number: PIC16HV785-E/ML
• Description: 3.5KB Flash, 128 RAM, 18 I/O 20 QFN 4x4mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16HV785-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Processor Series: PIC16H
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: RS- 232, USB
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120, DM163029
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 14 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFN
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC16F785/HV785
3.1.5.3
After receiving this command, the device will load in a
14-bit ‘data word’ when 16 cycles are applied.
However, the data memory is only 8 bits wide and thus,
only the first 8 bits of data after the Start bit will be
programmed into the data memory. It is still necessary
to cycle the clock the full 16 cycles in order to allow the
internal circuitry to reset properly. The data memory
contains 256 bytes.
FIGURE 3-6:
3.1.5.4
After receiving this command, the device will transmit
data bits out of the program memory (user or
configuration) currently accessed, starting with the
second rising edge of the clock input. The data pin will
go into Output mode on the second rising clock edge,
and it will revert to Input mode (high-impedance) after
the 16th rising edge.
If the program memory is code-protected (CP = 0), the
data is read as ‘0’s.
FIGURE 3-7:
DS41237D-page 10
ICSPCLK
ICSPCLK
ICSPDAT
ICSPDAT
Load Data for Data Memory
Read Data from Program Memory
1
1
1
0
T
SET
LOAD DATA FOR DATA MEMORY COMMAND
READ DATA FROM PROGRAM MEMORY COMMAND
2
2
0
1
1
1
3
3
0
input
T
4
4
0
0
HLD
1
5
5
x
x
6
6
x
x
T
T
DLY
T
DLY
DLY
2
2
1
1
strt_bit
1
strt_bit
T
DLY
1
2
2
LSb
LSb
T
DLY
3
3
3
4
4
output
 2009 Microchip Technology Inc.
MSb on 9th falling edge
5
5
15
15
MSb
16
16
stp_bit
stp_bit
input