PIC18C658-I/PT Microchip Technology, PIC18C658-I/PT Datasheet - Page 89
![32 KB OTP, 1536 RAM, 52 I/O 64 TQFP 10x10x1mm TRAY](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18C658-I/PT
Manufacturer Part Number
PIC18C658-I/PT
Description
32 KB OTP, 1536 RAM, 52 I/O 64 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C658-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC18C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1536 B
Interface Type
3-Wire, I2C, SPI, USART, CAN
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
52
Number Of Timers
4 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
ICE2000, DM163007, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
6
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18C658I/PT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C658-I/PT
Manufacturer:
Microchip
Quantity:
601
Company:
Part Number:
PIC18C658-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C658-IPT PDF datasheet #3
- PIC18C658-IPT PDF datasheet #4
- PIC18C658-IPT PDF datasheet #5
- PIC18C658-IPT PDF datasheet #6
- Current page: 89 of 366
- Download datasheet (7Mb)
8.0
Depending on the device selected, there are up to
eleven ports available. Some pins of the I/O ports are
multiplexed with an alternate function from the periph-
eral features on the device. In general, when a periph-
eral is enabled, that pin may not be used as a general
purpose I/O pin.
Each port has three registers for its operation. These
registers are:
• TRIS register (Data Direction register)
• PORT register (reads the levels on the pins of the
• LAT register (output latch)
The
read-modify-write operations on the value that the I/O
pins are driving.
8.1
PORTA is a 6-bit wide, bi-directional port. The corre-
sponding Data Direction register is TRISA. Setting a
TRISA bit (=1) will make the corresponding PORTA pin
an input (i.e., put the corresponding output driver in a
hi-impedance mode). Clearing a TRISA bit (=0) will
make the corresponding PORTA pin an output (i.e., put
the contents of the output latch on the selected pin).
On a Power-on Reset, these pins are configured as
inputs and read as '0'.
Reading the PORTA register reads the status of the
pins, whereas writing to it will write to the port latch.
Read-modify-write operations on the LATA register,
reads and writes the latched output value for PORTA.
The RA4 pin is multiplexed with the Timer0 module
clock input to become the RA4/T0CKI pin. The
RA4/T0CKI pin is a Schmitt Trigger input and an open
drain output. All other RA port pins have TTL input lev-
els and full CMOS output drivers.
The other PORTA pins are multiplexed with analog
inputs and the analog V
operation of each pin is selected by clearing/setting the
control bits in the ADCON1 register (A/D Control
Register1). On a Power-on Reset, these pins are con-
figured as analog inputs and read as '0'.
The TRISA register controls the direction of the RA
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISA register are
maintained set when using them as analog inputs.
2000 Microchip Technology Inc.
device)
data
I/O PORTS
PORTA, TRISA and LATA Registers
latch
(LAT
REF
register)
+ and V
REF
is
- inputs. The
Advanced Information
useful
for
EXAMPLE 8-1:
FIGURE 8-1:
CLRF
CLRF
MOVLW
MOVWF
MOVLW
MOVWF
WR TRISA
WR LATA
or
WR PORTA
Note 1:
Data
Bus
RD PORTA
To A/D Converter and LVD Modules
SS Input (RA5 only)
PORTA
LATA
0x07
ADCON1
0xCF
TRISA
I/O pins have diode protection to V
Data Latch
D
D
TRIS Latch
CK
CK
RA3:RA0 AND RA5 PINS
BLOCK DIAGRAM
RD LATA
; Initialize PORTA by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Configure A/D
; for digital inputs
; Value used to
; initialize data
; direction
; Set RA3:RA0 as inputs
; RA5:RA4 as outputs
INITIALIZING PORTA
Q
Q
Q
Q
RD TRISA
PIC18CXX8
Q
Analog
Input
Mode
EN
DS30475A-page 89
D
V
DD
V
P
N
SS
DD
and V
TTL
Input
Buffer
I/O Pin
SS
.
(1)
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