PIC18F2523-E/ML Microchip Technology, PIC18F2523-E/ML Datasheet - Page 36
PIC18F2523-E/ML
Manufacturer Part Number
PIC18F2523-E/ML
Description
32KB, Flash, 1536bytes-RAM, 25I/O, 8-bit Family,nanoWatt 28 QFN 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2423-ISP.pdf
(54 pages)
3.PIC18F2423-ISP.pdf
(8 pages)
4.PIC18F2423-ISP.pdf
(34 pages)
Specifications of PIC18F2523-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F2XXX/4XXX FAMILY
TABLE 5-3:
DS39622L-page 36
EBTR5
EBTR4
EBTR3
EBTR2
EBTR1
EBTR0
EBTRB
DEV<10:3>
DEV<2:0>
REV<4:0>
Note 1:
Bit Name
2:
The BBSIZ bits, BBSIZ<1:0> and BBSIZ<2:1> bits, cannot be changed once any of the following
code-protect bits are enabled: CPB or CP0, WRTB or WRT0, EBTRB or EBTR0.
Not available in PIC18FXX8X and PIC18F2450/4450 devices.
PIC18F2XXX/4XXX FAMILY BIT DESCRIPTIONS (CONTINUED)
Configuration
CONFIG7H
CONFIG7L
CONFIG7L
CONFIG7L
CONFIG7L
CONFIG7L
CONFIG7L
DEVID2
DEVID1
DEVID1
Words
Table Read Protection bit (Block 5 code memory area)
(PIC18F2685 and PIC18F4685 devices only)
1 = Block 5 is not protected from Table Reads executed in other blocks
0 = Block 5 is protected from Table Reads executed in other blocks
Table Read Protection bit (Block 4 code memory area)
(PIC18F2682/2685 and PIC18F4682/4685 devices only)
1 = Block 4 is not protected from Table Reads executed in other blocks
0 = Block 4 is protected from Table Reads executed in other blocks
Table Read Protection bit (Block 3 code memory area)
1 = Block 3 is not protected from Table Reads executed in other blocks
0 = Block 3 is protected from Table Reads executed in other blocks
Table Read Protection bit (Block 2 code memory area)
1 = Block 2 is not protected from Table Reads executed in other blocks
0 = Block 2 is protected from Table Reads executed in other blocks
Table Read Protection bit (Block 1 code memory area)
1 = Block 1 is not protected from Table Reads executed in other blocks
0 = Block 1 is protected from Table Reads executed in other blocks
Table Read Protection bit (Block 0 code memory area)
1 = Block 0 is not protected from Table Reads executed in other blocks
0 = Block 0 is protected from Table Reads executed in other blocks
Table Read Protection bit (Boot Block memory area)
1 = Boot Block is not protected from Table Reads executed in other blocks
0 = Boot Block is protected from Table Reads executed in other blocks
Device ID bits
These bits are used with the DEV<2:0> bits in the DEVID1 register to identify
part number.
Device ID bits
These bits are used with the DEV<10:3> bits in the DEVID2 register to identify
part number.
Revision ID bits
These bits are used to indicate the revision of the device. The REV4 bit is
sometimes used to fully specify the device type.
Description
2010 Microchip Technology Inc.