PIC18F2620T-I/SO Microchip Technology, PIC18F2620T-I/SO Datasheet

PIC18F2620T-I/SO

Manufacturer Part Number

PIC18F2620T-I/SO

Description

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,28PIN,PLASTIC

Manufacturer

Microchip Technology

Series

PIC® 18Fr

Datasheets

1.PIC16F616T-ISL.pdf (8 pages)

2.PIC18F2221-ISO.pdf (46 pages)

3.PIC18F2525-ISO.pdf (412 pages)

4.PIC18F2525-ISO.pdf (18 pages)

5.PIC18F2525-ISO.pdf (18 pages)

6.PIC18F2525-ISO.pdf (6 pages)

7.PIC18F2525-ISO.pdf (6 pages)

Specifications of PIC18F2620T-I/SO

Rohs Compliant

YES

Core Processor

PIC

Core Size

8-Bit

Speed

40MHz

Connectivity

I²C, SPI, UART/USART

Peripherals

Brown-out Detect/Reset, HLVD, POR, PWM, WDT

Number Of I /o

Program Memory Size

64KB (32K x 16)

Program Memory Type

FLASH

Eeprom Size

1K x 8

Ram Size

3.8K x 8

Voltage - Supply (vcc/vdd)

4.2 V ~ 5.5 V

Data Converters

A/D 10x10b

Oscillator Type

Internal

Operating Temperature

-40°C ~ 85°C

Package / Case

28-SOIC (7.5mm Width)

Processor Series

PIC18F

Core

PIC

Data Bus Width

8 bit

Data Ram Size

3986 B

Interface Type

SPI, I2C, EUSART

Maximum Clock Frequency

40 MHz

Number Of Programmable I/os

Number Of Timers

1 x 8

Operating Supply Voltage

4.2 V to 5.5 V

Maximum Operating Temperature

+ 85 C

Mounting Style

SMD/SMT

3rd Party Development Tools

52715-96, 52716-328, 52717-734, 52712-325, EWPIC18

Development Tools By Supplier

PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136

Minimum Operating Temperature

- 40 C

On-chip Adc

10 bit

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

For Use With

I3DB18F4620 - BOARD DAUGHTER ICEPIC3

Lead Free Status / Rohs Status

Details

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The PIC18F2525/2620/4525/4620 Rev. B4 parts you

have received conform functionally to the Device Data

Sheet

described below. Any Data Sheet Clarification issues

related to the PIC18F2525/2620/4525/4620 will be

reported in a separate Data Sheet errata. Please check

the Microchip web site for any existing issues.

The

PIC18F2525/2620/4525/4620 devices with these

Device/Revision IDs:

TABLE 1:

Param

The Device IDs (DEVID1 and DEVID2) are located at

addresses

configuration space. They are shown in binary in the

format “DEVID2 DEVID1”.

No.

Part Number

PIC18F2525

PIC18F2620

PIC18F4525

PIC18F4620

following

(DS39626C),

Symbol

PIC18F2525/2620/4525/4620 Rev. B4 Silicon Errata

3FFFFEh:3FFFFFh

EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING)

silicon

0000 1100 100

0000 1100 010

0000 1100 000

0000 1100 110

SS↓ to SCK↓ or SCK↑ Input

Device ID

except

errata apply

for

the

PIC18F2525/2620/4525/4620

Revision ID

the

Characteristic

0 0110

anomalies

only

device’s

1. Module: MSSP

In SPI Slave mode with slave select enabled

(SSPM3:0 = 0100), the minimum time between

the falling edge of the SS pin and the first SCK

edge is greater than specified in parameter 70 in

Table 26-16. The updated specification is shown in

bold in Table 1.

The minimum time between SS pin low and an

SSPBUF write is also 3 T

the SS pin occurs greater than 3 T

first SCK edge or loading SSPBUF, the peripheral

will function correctly. Also, if SSPBUF is written

prior to the SS pin going low, the peripheral will

function correctly.

Work around

None.

Date Codes that pertain to this issue:

All engineering and production devices.

3 T

Min

Max Units Conditions

—

. If the falling edge of

DS80282C-page 1

before the

Related parts for PIC18F2620T-I/SO

PIC18F2620T-I/SO Summary of contents

Page 1

... SS↓ to SCK↓ or SCK↑ Input © 2007 Microchip Technology Inc. PIC18F2525/2620/4525/4620 1. Module: MSSP In SPI Slave mode with slave select enabled the anomalies (SSPM3:0 = 0100), the minimum time between the falling edge of the SS pin and the first SCK edge is greater than specified in parameter 70 in Table 26-16 ...

Page 2

... TX and RX signals to be inverted (polarity reversed). RXDTP Synchronous mode DT signal. Register 18-3, on page 204, will be changed as shown on page 3. Work around None required. Date Codes that pertain to this issue: All engineering and production devices. (BAUDCON<4>) and RXDTP has no effect on the © 2007 Microchip Technology Inc. ...

Page 3

... ABDEN: Auto-Baud Detect Enable bit Asynchronous mode Enable baud rate measurement on the next character. Requires reception of a Sync field (55h); cleared in hardware upon completion Baud rate measurement disabled or completed Synchronous mode: Unused in this mode. © 2007 Microchip Technology Inc. PIC18F2525/2620/4525/4620 R/W-0 R/W-0 U-0 TXCKP BRG16 — ...

Page 4

... REVISION HISTORY Rev A Document (07/2006) First revision of this document. Silicon issues 1-2 (MSSP) and 3 (ECCP). Rev B Document (04/2007 Added silicon issue 4 (Enhanced Synchronous Receiver Transmitter – EUSART). Rev C Document (09/2007 Modified silicon issue 4 (EUSART). DS80282C-page 4 Universal © 2007 Microchip Technology Inc. ...

Page 5

... PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 6

... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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