PIC18F4320-E/PT Microchip Technology, PIC18F4320-E/PT Datasheet - Page 337
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,44PIN,PLASTIC](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC18F4320-E/PT
Manufacturer Part Number
PIC18F4320-E/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18F1320-ISS.pdf
(36 pages)
4.PIC18F2220-ISO.pdf
(394 pages)
5.PIC18F2220-ISO.pdf
(6 pages)
6.PIC18F2220-ISO.pdf
(6 pages)
7.PIC18F2220-ISO.pdf
(8 pages)
8.PIC18F2220-ISO.pdf
(6 pages)
9.PIC18F2220-ISO.pdf
(6 pages)
Specifications of PIC18F4320-E/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4320-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18F1320-ISS PDF datasheet #3
- PIC18F2220-ISO PDF datasheet #4
- PIC18F2220-ISO PDF datasheet #5
- PIC18F2220-ISO PDF datasheet #6
- PIC18F2220-ISO PDF datasheet #7
- PIC18F2220-ISO PDF datasheet #8
- PIC18F2220-ISO PDF datasheet #9
- Current page: 337 of 394
- Download datasheet (7Mb)
TABLE 26-13: PARALLEL SLAVE PORT REQUIREMENTS (PIC18F4X20)
FIGURE 26-13:
© 2007 Microchip Technology Inc.
62
63
64
65
66
Param.
No.
(CKP = 0)
(CKP = 1)
SDI
SS
SCK
SCK
SDO
Note:
T
T
T
T
T
WR
RD
RD
IBF
DT
Symbol
Refer to Figure 26-5 for load conditions.
V2
L2
H2
INH
H2
WR
DT
DT
DT
V RD ↓ and CS ↓ to Data–Out Valid
I
H Data In Valid Before WR ↑ or CS ↑
I WR ↑ or CS ↑ to Data–In
(setup time)
Invalid (hold time)
RD ↑ or CS ↓ to Data–Out Invalid
Inhibit of the IBF Flag bit being Cleared from
WR ↑ or CS ↑
EXAMPLE SPI MASTER MODE TIMING (CKE = 0)
70
80
71
73
MSb In
Characteristic
MSb
74
72
PIC18F2220/2320/4220/4320
75, 76
PIC18FXX20
PIC18LFXX20
bit 6 - - - - - -1
bit 6 - - - -1
78
79
Min
20
20
35
10
—
—
LSb
3 T
79
78
Max
80
30
—
—
—
LSb In
CY
Units
ns
ns
ns
ns
ns
DS39599G-page 335
Conditions
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