PIC18F458-E/PT Microchip Technology, PIC18F458-E/PT Datasheet - Page 44
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,44PIN,PLASTIC](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC18F458-E/PT
Manufacturer Part Number
PIC18F458-E/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18LF242-ISO.pdf
(36 pages)
3.PIC18F248-ISO.pdf
(402 pages)
4.PIC18F248-ISO.pdf
(8 pages)
Specifications of PIC18F458-E/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
SPIC, I2C, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
33
Number Of Timers
4 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136, DM163011
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F458-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18LF242-ISO PDF datasheet #2
- PIC18F248-ISO PDF datasheet #3
- PIC18F248-ISO PDF datasheet #4
- Current page: 44 of 402
- Download datasheet (7Mb)
EXAMPLE 4-2:
EXAMPLE 4-3:
DS41159E-page 42
PIC18FXX8
MOVLW 055h
GOTO 000006h
MOVFF 123h, 456h
1. MOVLW 55h
2. MOVWF PORTB
3. BRA SUB_1
4. BSF
5. Instruction @ address SUB_1
Note:
All instructions are single cycle, except for any program branches. These take two cycles, since the fetch instruction is
“flushed” from the pipeline while the new instruction is being fetched and then executed.
Instruction
PORTA, BIT3 (Forced NOP)
—
—
INSTRUCTION PIPELINE FLOW
INSTRUCTIONS IN PROGRAM MEMORY
Fetch 1
T
CY
0
0EF03h, 0F000h
0C123h, 0F456h
Execute 1
Opcode
Fetch 2
0E55h
T
CY
1
Execute 2
Fetch 3
T
CY
2
Execute 3
Memory
Fetch 4
T
0EFh
0C1h
0F0h
0F4h
0Eh
CY
55h
03h
00h
23h
56h
3
Fetch SUB_1
© 2006 Microchip Technology Inc.
Flush
T
CY
4
Execute SUB_1
Address
00000Ah
00000Bh
00000Ch
00000Dh
00000Eh
000007h
000008h
000009h
00000Fh
000010h
000012h
000011h
T
CY
5
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