PIC18F4585-E/ML Microchip Technology, PIC18F4585-E/ML Datasheet - Page 126

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC

PIC18F4585-E/ML

Manufacturer Part Number
PIC18F4585-E/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4585-E/ML

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
44
Number Of Timers
1 x 8
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163011
Minimum Operating Temperature
- 40 C
On-chip Adc
11 bit
Height
0.88 mm
Length
8 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.2 V
Width
8 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4680 - BOARD DAUGHTER ICEPIC3
Lead Free Status / Rohs Status
 Details
PIC18F2585/2680/4585/4680
9.4
The IPR registers contain the individual priority bits for
the peripheral interrupts. Due to the number of
peripheral interrupt sources, there are two Peripheral
Interrupt Priority registers (IPR1, IPR2). Using the
priority bits requires that the Interrupt Priority Enable
(IPEN) bit be set.
REGISTER 9-10:
DS39625C-page 124
IPR Registers
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
IPR1: PERIPHERAL INTERRUPT PRIORITY REGISTER 1
bit 7
PSPIP: Parallel Slave Port Read/Write Interrupt Priority bit
1 = High priority
0 = Low priority
ADIP: A/D Converter Interrupt Priority bit
1 = High priority
0 = Low priority
RCIP: EUSART Receive Interrupt Priority bit
1 = High priority
0 = Low priority
TXIP: EUSART Transmit Interrupt Priority bit
1 = High priority
0 = Low priority
SSPIP: Master Synchronous Serial Port Interrupt Priority bit
1 = High priority
0 = Low priority
CCP1IP: CCP1 Interrupt Priority bit
1 = High priority
0 = Low priority
TMR2IP: TMR2 to PR2 Match Interrupt Priority bit
1 = High priority
0 = Low priority
TMR1IP: TMR1 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
Legend:
R = Readable bit
-n = Value at POR
PSPIP
R/W-1
Note 1: This bit is reserved on PIC18F2X8X devices; always maintain this bit set.
(1)
R/W-1
ADIP
R/W-1
RCIP
Preliminary
W = Writable bit
‘1’ = Bit is set
R/W-1
TXIP
SSPIP
R/W-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1)
CCP1IP
R/W-1
© 2007 Microchip Technology Inc.
x = Bit is unknown
TMR2IP
R/W-1
TMR1IP
R/W-1
bit 0

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