PIC18F4685-E/ML Microchip Technology, PIC18F4685-E/ML Datasheet - Page 477
![96KB, Flash, 3328bytes-RAM, 36I/O, 8-bit Family,nanoWatt,ECAN 44 QFN 8x8x0.9mm T](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18F4685-E/ML
Manufacturer Part Number
PIC18F4685-E/ML
Description
96KB, Flash, 3328bytes-RAM, 36I/O, 8-bit Family,nanoWatt,ECAN 44 QFN 8x8x0.9mm T
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PCM18XT0.pdf
(484 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F2682-ISP.pdf
(6 pages)
4.PIC18F2682-ISP.pdf
(4 pages)
Specifications of PIC18F4685-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
80KB (40K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
44
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4680 - BOARD DAUGHTER ICEPIC3
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4685-E/ML
Manufacturer:
MICROCHIP
Quantity:
3 000
- PCM18XT0 PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2682-ISP PDF datasheet #3
- PIC18F2682-ISP PDF datasheet #4
- Current page: 477 of 484
- Download datasheet (9Mb)
RESET ............................................................................. 395
Resets ........................................................................ 43, 345
RETFIE ............................................................................ 396
RETLW ............................................................................ 396
RETURN .......................................................................... 397
© 2009 Microchip Technology Inc.
RXBnEIDL (Receive Buffer n
RXBnSIDH (Receive Buffer n
RXBnSIDL (Receive Buffer n
RXERRCNT (Receive Error Count) ......................... 296
RXFBCONn (Receive Filter Buffer Control n) .......... 309
RXFCONn (Receive Filter Control n) ....................... 308
RXFnEIDH (Receive Acceptance Filter n
RXFnEIDL (Receive Acceptance Filter n
RXFnSIDH (Receive Acceptance Filter n
RXFnSIDL (Receive Acceptance Filter n
RXMnEIDH (Receive Acceptance Mask n
RXMnEIDL (Receive Acceptance Mask n
RXMnSIDH (Receive Acceptance Mask n
RXMnSIDL (Receive Acceptance Mask n
SDFLC (Standard Data Bytes Filter Length Count) . 308
SSPCON1 (MSSP Control 1, I
SSPCON1 (MSSP Control 1, SPI Mode) ................. 191
SSPCON2 (MSSP Control 2, I
SSPSTAT (MSSP Status, I
SSPSTAT (MSSP Status, SPI Mode) ...................... 190
STATUS ..................................................................... 89
STKPTR (Stack Pointer) ............................................ 65
T0CON (Timer0 Control) .......................................... 149
T1CON (Timer1 Control) .......................................... 153
T2CON (Timer2 Control) .......................................... 159
T3CON (Timer3 Control) .......................................... 161
TRISE (PORTE/PSP Control) .................................. 144
TXBIE (Transmit Buffers Interrupt Enable) .............. 321
TXBnCON (Transmit Buffer n Control) .................... 284
TXBnDLC (Transmit Buffer n
TXBnDm (Transmit Buffer n
TXBnEIDH (Transmit Buffer n
TXBnEIDL (Transmit Buffer n
TXBnSIDH (Transmit Buffer n
TXBnSIDL (Transmit Buffer n
TXERRCNT (Transmit Error Count) ........................ 287
TXSTA (Transmit Status and Control) ..................... 230
WDTCON (Watchdog Timer Control) ...................... 356
Brown-out Reset (BOR) ........................................... 345
Oscillator Start-up Timer (OST) ............................... 345
Power-on Reset (POR) ............................................ 345
Power-up Timer (PWRT) ......................................... 345
Extended Identifier, Low Byte) ......................... 294
Standard Identifier, High Byte) ......................... 293
Standard Identifier, Low Byte) ......................... 294
Extended Identifier, High Byte) ........................ 306
Extended Identifier, Low Byte) ......................... 306
Standard Identifier Filter, High Byte) ................ 305
Standard Identifier Filter, Low Byte) ................ 305
Extended Identifier Mask, High Byte) .............. 307
Extended Identifier Mask, Low Byte) ............... 307
Standard Identifier Mask, High Byte) ............... 306
Standard Identifier Mask, Low Byte) ................ 307
Data Length Code) .......................................... 287
Data Field Byte m) ........................................... 286
Extended Identifier, High Byte) ........................ 285
Extended Identifier, Low Byte) ......................... 286
Standard Identifier, High Byte) ......................... 285
Standard Identifier, Low Byte) ......................... 285
2
C Mode) ....................... 199
2
2
C Mode) ................. 200
C Mode) ................. 201
PIC18F2682/2685/4682/4685
Return Address Stack ........................................................ 64
Return Stack Pointer (STKPTR) ........................................ 65
Revision History ............................................................... 465
RLCF ............................................................................... 397
RLNCF ............................................................................. 398
RRCF ............................................................................... 398
RRNCF ............................................................................ 399
S
SCK ................................................................................. 189
SDI ................................................................................... 189
SDO ................................................................................. 189
SEC_IDLE Mode ............................................................... 40
SEC_RUN Mode ................................................................ 36
Serial Clock, SCK ............................................................ 189
Serial Data In (SDI) .......................................................... 189
Serial Data Out (SDO) ..................................................... 189
Serial Peripheral Interface. See SPI Mode.
SETF ............................................................................... 399
Slave Select (SS) ............................................................. 189
SLEEP ............................................................................. 400
Sleep
Software Simulator (MPLAB SIM) ................................... 417
Special Event Trigger. See Compare (CCP1/ECCP1 Mod-
Special Event Trigger. See Compare (ECCP1 Module).
Special Function Registers
SPI Mode (MSSP) ........................................................... 189
SS .................................................................................... 189
SSPOV ............................................................................ 219
SSPOV Status Flag ......................................................... 219
SSPSTAT Register
Stack Full/Underflow Resets .............................................. 66
Status Register .................................................................. 89
SUBFSR .......................................................................... 411
SUBFWB ......................................................................... 400
SUBLW ............................................................................ 401
SUBULNK ........................................................................ 411
SUBWF ............................................................................ 401
SUBWFB ......................................................................... 402
SWAPF ............................................................................ 402
Associated Registers ................................................. 64
OSC1 and OSC2 Pin States ...................................... 33
ules).
Map ...................................................................... 72–77
Associated Registers ............................................... 197
Bus Mode Compatibility ........................................... 197
Effects of a Reset .................................................... 197
Enabling SPI I/O ...................................................... 193
Master Mode ............................................................ 194
Master/Slave Connection ........................................ 193
Operation ................................................................. 192
Operation in Power-Managed Modes ...................... 197
Serial Clock ............................................................. 189
Serial Data In ........................................................... 189
Serial Data Out ........................................................ 189
Slave Mode .............................................................. 195
Slave Select ............................................................. 189
Slave Select Synchronization .................................. 195
SPI Clock ................................................................. 194
Typical Connection .................................................. 193
R/W Bit ............................................................ 202, 203
DS39761C-page 477
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