PIC18F6720-E/PT Microchip Technology, PIC18F6720-E/PT Datasheet - Page 45
PIC18F6720-E/PT
Manufacturer Part Number
PIC18F6720-E/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F8520T-IPT.pdf
(380 pages)
3.PIC18F8520T-IPT.pdf
(40 pages)
4.PIC18F6620-IPT.pdf
(14 pages)
5.PIC18F6620-IPT.pdf
(12 pages)
Specifications of PIC18F6720-E/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.75K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.75 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
52
Number Of Timers
2 x 8 bit
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032, DM183022
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F6720-E/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
PIC18F6720-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F8520T-IPT PDF datasheet #2
- PIC18F8520T-IPT PDF datasheet #3
- PIC18F6620-IPT PDF datasheet #4
- PIC18F6620-IPT PDF datasheet #5
- Current page: 45 of 380
- Download datasheet (7Mb)
REGISTER 4-2:
FIGURE 4-3:
4.2.3
Since the Top-of-Stack (TOS) is readable and writable,
the ability to push values onto the stack and pull values
off the stack, without disturbing normal program
execution, is a desirable option. To push the current PC
value onto the stack, a PUSH instruction can be
executed. This will increment the stack pointer and load
the current PC value onto the stack. TOSU, TOSH and
TOSL can then be modified to place a return address
on the stack.
The ability to pull the TOS value off of the stack and
replace it with the value that was previously pushed
onto the stack, without disturbing normal execution, is
achieved by using the POP instruction. The POP
instruction discards the current TOS by decrementing
the stack pointer. The previous value pushed onto the
stack then becomes the TOS value.
2004 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4-0
PUSH AND POP INSTRUCTIONS
PIC18F6520/8520/6620/8620/6720/8720
TOSU
STKPTR REGISTER
RETURN ADDRESS STACK AND ASSOCIATED REGISTERS
0x00
STKFUL: Stack Full Flag bit
1 = Stack became full or overflowed
0 = Stack has not become full or overflowed
STKUNF: Stack Underflow Flag bit
1 = Stack underflow occurred
0 = Stack underflow did not occur
Unimplemented: Read as ‘0’
SP4:SP0: Stack Pointer Location bits
Legend:
R = Readable bit
- n = Value at POR
bit 7
STKFUL
Note 1: Bit 7 and bit 6 can only be cleared in user software or by a POR.
R/C-0
(1)
TOSH
STKUNF
0x1A
R/C-0
(1)
Top-of-Stack
TOSL
0x34
W = Writable bit
‘1’ = Bit is set
U-0
—
Return Address Stack
R/W-0
0x001A34
0x000D58
4.2.4
These Resets are enabled by programming the
STVREN configuration bit. When the STVREN bit is
disabled, a full or underflow condition will set the
appropriate STKFUL or STKUNF bit, but not cause a
device Reset. When the STVREN bit is enabled, a full
or underflow condition will set the appropriate STKFUL
or STKUNF bit and then cause a device Reset. The
STKFUL or STKUNF bits are only cleared by the user
software or a POR Reset.
SP4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
STACK FULL/UNDERFLOW RESETS
11111
11110
11101
00011
00010
00001
00000
SP3
STKPTR<4:0>
R/W-0
00010
SP2
x = Bit is unknown
R/W-0
SP1
DS39609B-page 43
R/W-0
SP0
bit 0
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