PIC18LF24J10-I/SS Microchip Technology, PIC18LF24J10-I/SS Datasheet - Page 326
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PIC18LF24J10-I/SS
Manufacturer Part Number
PIC18LF24J10-I/SS
Description
Microcontroller
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F24J10-ISO.pdf
(368 pages)
3.PIC18F24J10-ISO.pdf
(6 pages)
4.PIC18F24J10-ISO.pdf
(6 pages)
5.PIC18F24J10-ISO.pdf
(12 pages)
6.PIC18LF24J10-ISS.pdf
(32 pages)
Specifications of PIC18LF24J10-I/SS
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPIC, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180012 - MODULE PLUG-IN 18LF25J10 28SOICAC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164331 - MODULE SKT FOR 28SSOP 18F45J10XLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- PIC16F616T-ISL PDF datasheet
- PIC18F24J10-ISO PDF datasheet #2
- PIC18F24J10-ISO PDF datasheet #3
- PIC18F24J10-ISO PDF datasheet #4
- PIC18F24J10-ISO PDF datasheet #5
- PIC18LF24J10-ISS PDF datasheet #6
- Current page: 326 of 368
- Download datasheet (6Mb)
PIC18F45J10 FAMILY
FIGURE 24-9:
TABLE 24-12: CAPTURE/COMPARE/PWM REQUIREMENTS (INCLUDING ECCP MODULE)
TABLE 24-13: PARALLEL SLAVE PORT REQUIREMENTS
DS39682E-page 324
62
63
64
65
66
50
51
52
53
54
Param
Param.
No.
No.
(Compare or PWM Mode)
Note:
Symbol
T
T
T
T
T
TdtV2wrH
TwrH2dtI
TrdL2dtV
TrdH2dtI
TibfINH
CC
CC
CC
CC
CC
Symbol
L
H
P
R
F
(Capture Mode)
Refer to Figure 24-3 for load conditions.
CCPx Input Low
Time
CCPx Input
High Time
CCPx Input Period
CCPx Output Fall Time
CCPx Output Fall Time
CAPTURE/COMPARE/PWM TIMINGS (INCLUDING ECCP MODULE)
Data In Valid before WR ↑ or CS ↑ (setup time)
WR ↑ or CS ↑ to Data–In Invalid (hold time)
RD ↓ and CS ↓ to Data–Out Valid
RD ↑ or CS ↓ to Data–Out Invalid
Inhibit of the IBF Flag bit being Cleared from
WR ↑ or CS ↑
CCPx
CCPx
Characteristic
No prescaler
With prescaler
No prescaler
With prescaler
Characteristic
53
50
0.5 T
0.5 T
52
54
3 T
CY
Min
CY
CY
10
10
—
—
N
Min
+ 40
20
20
10
—
—
+ 20
+ 20
51
3 T
Max
80
30
—
—
CY
Max
25
25
—
—
—
—
—
© 2009 Microchip Technology Inc.
Units
ns
ns
ns
ns
Units
ns
ns
ns
ns
ns
ns
ns
N = prescale
value (1, 4 or 16)
Conditions
Conditions
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