PIC18LF2550T-I/SO Microchip Technology, PIC18LF2550T-I/SO Datasheet - Page 16
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PIC18LF2550T-I/SO
Manufacturer Part Number
PIC18LF2550T-I/SO
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PCM18XR1.pdf
(438 pages)
3.PIC18F2221-ISO.pdf
(46 pages)
4.PIC18F2455-ISO.pdf
(14 pages)
5.PIC18F2455-ISO.pdf
(8 pages)
6.PIC18F2455-ISO.pdf
(26 pages)
Specifications of PIC18LF2550T-I/SO
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, I2C, EAUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163025, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F2455/2550/4455/4550
38. Module: MSSP
EXAMPLE 7:
EXAMPLE 8:
DS80478A-page 16
WriteSPI:
BCF
MOVF
MOVLW 0xA5
MOVWF SSPBUF
WaitXmitComplete:
BTFSS PIR1, SSPIF
BRA
MOVF
unsigned char WriteSPI(unsigned char ByteToSend)
{
}
If the application firmware is expecting to receive
valid data, in either SPI Slave or Master mode, the
firmware must read from the SSPBUF register
before writing the next byte to transmit to SSPBUF.
If the firmware does not read from SSPBUF, the
BF bit (SSPSTAT<0>) can still be set from the pre-
vious transaction. If the BF bit is set, the incoming
data byte is blocked from transferring from the
SSPSR Shift register to the SSPBUF register. If
the firmware then reads from SSPBUF, the data
read will not match the data most recently received
on the SDI pin.
unsigned char TempVariable;
PIR1bits.SSPIF = 0;
TempVariable = SSPBUF;
SSPBUF = ByteToSend;
while(!PIR1bits.SSPIF);
return SSPBUF;
PIR1, SSPIF
SSPBUF, w
WaitXmitComplete
SSPBUF, w
SAMPLE ASSEMBLY CODE FOR TRANSFERRING SPI DATA
SAMPLE C CODE FOR TRANSFERRING SPI DATA
;Perform read, even if the data in SSPBUF is not important
;In this example, let’s send “0xA5” to the other SPI device.
;The data received should be valid.
// Reads from SSPBUF, ensures BF bit is clear before
// sending the next byte.
// Wait until the transmission is complete.
// The data received should be valid.
In earlier silicon revisions (A3, B4 and B5), incom-
ing data bytes received on the SDI pin are always
transferred from SSPSR to SSPBUF, regardless of
the state of the BF bit.
Work around
If the firmware expects to receive valid data,
always clear the BF bit by reading from SSPBUF
prior to writing to SSPBUF, even when the current
data in SSPBUF is not important. Sample work
around code, suitable for all silicon revisions, is
given in Example 7 (Assembly language) and
Example 8 (C language).
Affected Silicon Revisions
A3
B4
© 2009 Microchip Technology Inc.
B5
B6
X
B7
X