PIC18LF2580-I/SP Microchip Technology, PIC18LF2580-I/SP Datasheet - Page 483
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PIC18LF2580-I/SP
Manufacturer Part Number
PIC18LF2580-I/SP
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F4480-IPT.pdf
(490 pages)
3.PIC18LF2480-ISP.pdf
(14 pages)
Specifications of PIC18LF2580-I/SP
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163011, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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RESET ............................................................................. 397
Resets ........................................................................ 47, 349
RETFIE ............................................................................ 398
RETLW ............................................................................ 398
RETURN .......................................................................... 399
Return Address Stack ........................................................ 68
Return Stack Pointer (STKPTR) ........................................ 69
Revision History ............................................................... 471
RLCF ................................................................................ 399
RLNCF ............................................................................. 400
RRCF ............................................................................... 400
RRNCF ............................................................................ 401
S
SCK .................................................................................. 191
SDI ................................................................................... 191
SDO ................................................................................. 191
SEC_IDLE Mode ................................................................ 44
SEC_RUN Mode ................................................................ 40
Serial Clock, SCK ............................................................ 191
Serial Data In (SDI) .......................................................... 191
Serial Data Out (SDO) ..................................................... 191
Serial Peripheral Interface. See SPI Mode.
SETF ................................................................................ 401
Slave Select (SS) ............................................................. 191
SLEEP ............................................................................. 402
Sleep
Software Simulator (MPLAB SIM) .................................... 419
Special Event Trigger. See Compare (ECCP Mode).
Special Event Trigger. See Compare (ECCP Module).
Special Features of the CPU ........................................... 349
Special Function Registers ................................................ 77
SPI Mode (MSSP)
© 2009 Microchip Technology Inc.
STATUS ..................................................................... 94
STKPTR (Stack Pointer) ............................................ 69
T0CON (Timer0 Control) .......................................... 151
T1CON (Timer 1 Control) ......................................... 155
T2CON (Timer2 Control) .......................................... 161
T3CON (Timer3 Control) .......................................... 163
TRISE (PORTE/PSP Control) .................................. 147
TXBIE (Transmit Buffers Interrupt Enable) .............. 324
TXBnCON (Transmit Buffer n Control) .................... 288
TXBnDLC (Transmit Buffer n
TXBnDm (Transmit Buffer n Data Field Byte m) ...... 290
TXBnEIDH (Transmit Buffer n Extended
TXBnEIDL (Transmit Buffer n Extended
TXBnSIDH (Transmit Buffer n Standard
TXBnSIDL (Transmit Buffer n Standard
TXERRCNT (Transmit Error Count) ........................ 291
TXSTA (Transmit Status and Control) ..................... 232
WDTCON (Watchdog Timer Control) ...................... 359
Brown-out Reset (BOR) ........................................... 349
Oscillator Start-up Timer (OST) ............................... 349
Power-on Reset (POR) ............................................ 349
Power-up Timer (PWRT) ......................................... 349
and Associated Registers .......................................... 68
OSC1 and OSC2 Pin States ...................................... 37
Map ...................................................................... 77–82
Associated Registers ............................................... 199
Bus Mode Compatibility ........................................... 199
Effects of a Reset ..................................................... 199
Data Length Code) .......................................... 291
Identifier, High Byte) ........................................ 289
Identifier, Low Byte) ......................................... 290
Identifier, High Byte) ........................................ 289
Identifier, Low Byte) ......................................... 289
PIC18F2480/2580/4480/4580
SS .................................................................................... 191
SSPOV ............................................................................ 221
SSPOV Status Flag ......................................................... 221
SSPSTAT Register
Stack Full/Underflow Resets .............................................. 70
STATUS Register .............................................................. 94
SUBFSR .......................................................................... 413
SUBFWB ......................................................................... 402
SUBLW ............................................................................ 403
SUBULNK ........................................................................ 413
SUBWF ............................................................................ 403
SUBWFB ......................................................................... 404
SWAPF ............................................................................ 404
T
T0CON Register
Table Pointer Operations (table) ...................................... 104
Table Reads/Table Writes ................................................. 70
TBLRD ............................................................................. 405
TBLWT ............................................................................ 406
Time-out in Various Situations (table) ................................ 51
Timer0 ............................................................................. 151
Timer1 ............................................................................. 155
Timer2 ............................................................................. 161
Enabling SPI I/O ...................................................... 195
Master Mode ............................................................ 196
Master/Slave Connection ........................................ 195
Operation ................................................................. 194
Operation in Power-Managed Modes ...................... 199
Serial Clock ............................................................. 191
Serial Data In ........................................................... 191
Serial Data Out ........................................................ 191
Slave Mode .............................................................. 197
Slave Select ............................................................. 191
Slave Select Synchronization .................................. 197
SPI Clock ................................................................. 196
Typical Connection .................................................. 195
R/W Bit ............................................................ 204, 205
PSA Bit .................................................................... 153
T0CS Bit .................................................................. 152
T0PS2:T0PS0 Bits ................................................... 153
T0SE Bit .................................................................. 152
16-Bit Mode Reads and Writes ................................ 152
Associated Registers ............................................... 153
Clock Source Edge Select (T0SE Bit) ..................... 152
Clock Source Select (T0CS Bit) .............................. 152
Operation ................................................................. 152
Overflow Interrupt .................................................... 153
Prescaler. See Prescaler, Timer0.
16-Bit Read/Write Mode .......................................... 157
Associated Registers ............................................... 159
Interrupt ................................................................... 158
Operation ................................................................. 156
Oscillator .......................................................... 155, 157
Oscillator Layout Considerations ............................. 158
Overflow Interrupt .................................................... 155
Resetting, Using a Special Event Trigger
Special Event Trigger (ECCP) ................................. 178
TMR1H Register ...................................................... 155
TMR1L Register ...................................................... 155
Use as a Real-Time Clock ....................................... 158
Associated Registers ............................................... 162
Interrupt ................................................................... 162
Operation ................................................................. 161
Output ...................................................................... 162
Output (CCP) .................................................. 158
DS39637D-page 483
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