PIC18LF4221-I/ML Microchip Technology, PIC18LF4221-I/ML Datasheet - Page 157

• Manufacturer Part Number: PIC18LF4221-I/ML
• Description: 4 KB Flash, 512 RAM 44 QFN 8x8x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF4221-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

FIGURE 17-2:
FIGURE 17-3:
© 2009 Microchip Technology Inc.
Relationships:
• Period = 4 * T
• Duty Cycle = T
• Delay = 4 * T
Note 1:
00
10
01
11
00
10
01
11
(Single Output)
CCP1CON
(Single Output)
(Half-Bridge)
CCP1CON
(Full-Bridge,
(Full-Bridge,
(Half-Bridge)
(Full-Bridge,
(Full-Bridge,
Forward)
Reverse)
Reverse)
Forward)
<7:6>
<7:6>
Dead-band delay is programmed using the ECCP1DEL register (see Section 17.4.6 “Programmable
Dead-Band Delay”).
OSC
PWM OUTPUT RELATIONSHIPS (ACTIVE-HIGH STATE)
PWM OUTPUT RELATIONSHIPS (ACTIVE-LOW STATE)
OSC
PIC18F2221/2321/4221/4321 FAMILY
OSC
* (ECCP1DEL<6:0>)
* (PR2 + 1) * (TMR2 Prescale Value)
* (CCPR1L<7:0>:CCP1CON<5:4>) * (TMR2 Prescale Value)
P1A Modulated
P1A Modulated
P1B Modulated
P1A Active
P1B Inactive
P1C Inactive
P1D Modulated
P1A Inactive
P1B Modulated
P1C Active
P1D Inactive
P1A Modulated
P1A Modulated
P1B Modulated
P1A Active
P1B Inactive
P1C Inactive
P1D Modulated
P1A Inactive
P1B Modulated
P1C Active
P1D Inactive
SIGNAL
SIGNAL
0
0
Delay
Delay
(1)
(1)
Cycle
Duty
Cycle
Duty
Delay
Period
Delay
Period
(1)
(1)
DS39689F-page 157
PR2 + 1
PR2 + 1