PIC18LF8585-I/PT Microchip Technology, PIC18LF8585-I/PT Datasheet - Page 35

• Manufacturer Part Number: PIC18LF8585-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,80PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF8585-I/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 48KB (24K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3328 B
• Interface Type: I2C, SPI, AUSART, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163015
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC18LF8585-I/PTR; PIC18LF8585-I/PTR

TABLE 5-4:
5.6
To allow portability of code, a PIC18FXX80/XX85
programmer is required to read the data EEPROM
information from the HEX file. If data EEPROM infor-
mation is not present, a simple warning message
 2010 Microchip Technology Inc.
Legend:
PIC18F8680
Device
Embedding Data EEPROM
Information in the HEX File
Item
CFGW
SUM[a:b] = Sum of locations, a to b inclusive
SUM_ID = Byte-wise sum of lower four bits of all customer ID locations
+
&
Code-Protect
Boot Block
CHECKSUM COMPUTATION (CONTINUED)
Block1/
Block2
None
Boot/
All
= Configuration Word
= Addition
= Bit-wise AND
Description
SUM(0000:07FFh) + SUM(0800:3FFFh) + SUM(4000:7FFFh) +
SUM(8000:0BFFFh) + SUM(0C000:0FFFFh) + (CFGW1L & 00h) +
(CFGW1H & 2Fh) + (CFGW2L & 0Fh) + (CFGW2H & 1Fh) +
(CFGW3L & 83h) + (CFGW3H & 80h) + (CFGW4L & 85h) +
(CFGW4H & 00h) + (CFGW5L & 0Fh) + (CFGW5H & 0C0h) +
(CFGW6L & 0Fh) + (CFGW6H & 0E0h) + (CFGW7L & 0Fh) +
(CFGW7H & 40h)
SUM(0800:3FFFh) + SUM(4000:7FFFh) + SUM(8000:0BFFFh) +
SUM(0C000:0FFFFh) + (CFGW1L & 00h) + (CFGW1H & 2Fh) +
(CFGW2L & 0Fh) + (CFGW2H & 1Fh) + (CFGW3L & 83h) +
(CFGW3H & 80h) + (CFGW4L & 85h) + (CFGW4H & 00h) +
(CFGW5L & 0Fh) + (CFGW5H & 80h) + (CFGW6L & 0Fh) +
(CFGW6H & 0E0h) + (CFGW7L & 0Fh) + (CFGW7H & 40h) +
SUM(IDs)
SUM(8000:0BFFFh) + SUM(0C000:0FFFFh) + (CFGW1L & 00h) +
(CFGW1H & 2Fh) + (CFGW2L & 0Fh) + (CFGW2H & 1Fh) +
(CFGW3L & 83h) + (CFGW3H & 80h) + (CFGW4L & 85h) +
(CFGW4H & 00h) + (CFGW5L & 0Ch) + (CFGW5H & 80h) +
(CFGW6L & 0Fh) + (CFGW6H & 0E0h) + (CFGW7L & 0Fh) +
(CFGW7H & 40h) + SUM(IDs)
(CFGW1L & 00h) + (CFGW1H & 2Fh) + (CFGW2L & 0Fh) +
(CFGW2H & 1Fh) + (CFGW3L & 83h) + (CFGW3H & 80h) +
(CFGW4L & 85h) + (CFGW4H & 00h) + (CFGW5L & 00h) +
(CFGW5H & 00h) + (CFGW6L & 0Fh) + (CFGW6H & 0E0h) +
(CFGW7L & 0Fh) + (CFGW7H & 40h) + SUM(IDs)
Checksum
should be issued. Similarly, when saving a HEX file, all
data EEPROM information must be included. An option
to not include the data EEPROM information may be
provided. When embedding data EEPROM information
in the HEX file, it should start at address F00000h.
Microchip Technology Inc. believes that this feature is
important for the benefit of the end customer.
PIC18FXX80/XX85
0FBC6h
03F2h
83C3h
0337h
Blank
Value
DS39606E-page 35
0AAh at 0
and Max
Address
0FB6Ch
0348h
8369h
0332h