PIC18LF8585-I/PT Microchip Technology, PIC18LF8585-I/PT Datasheet - Page 5
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PIC18LF8585-I/PT
Manufacturer Part Number
PIC18LF8585-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,80PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PCM18XK1.pdf
(496 pages)
3.PIC18F6585-IPT.pdf
(8 pages)
4.PIC18F6585-IPT.pdf
(38 pages)
5.PIC18F6585-IPT.pdf
(14 pages)
Specifications of PIC18LF8585-I/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3328 B
Interface Type
I2C, SPI, AUSART, CAN
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163015
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC18LF8585-I/PTR
PIC18LF8585-I/PTR
PIC18LF8585-I/PTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF8585-I/PT
Manufacturer:
Microchip
Quantity:
130
Company:
Part Number:
PIC18LF8585-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
2.3
The code memory space extends from 0000h to
0FFFFh (64 Kbytes) in four 16-Kbyte blocks. However,
addresses 0000h through 07FFh define a “Boot Block”
region that is treated separately from Block 1. All of
these blocks define code protection boundaries within
the code memory space.
In contrast, code memory panels are defined in 8-Kbyte
boundaries. Panels are discussed in greater detail in
Section 3.2 “Code Memory Programming”.
FIGURE 2-4:
2010 Microchip Technology Inc.
000000h
00FFFFh
1FFFFFh
3FFFFFh
Note:
Memory Map
Sizes of memory areas are not shown to scale.
Unimplemented
Code Memory
Configuration
Read as ‘0’
and ID
Space
MEMORY MAP AND THE CODE MEMORY SPACE FOR PIC18FXX80/XX85 DEVICES
TABLE 2-2:
PIC18F6585
PIC18F8585
PIC18F6680
PIC18F8680
Block 1
Block 2
Block 3
Unimplemented
Unimplemented
PIC18FXX80/XX85
Read as ‘0’s
Read as ‘0’s
Device
Boot Block
48 Kbytes
Panel 1
Panel 2
Panel 3
Panel 4
Panel 5
Panel 6
IMPLEMENTATION OF CODE
MEMORY
Unimplemented
Block 1
Block 2
Block 3
Block 4
Read as ‘0’s
Boot Block
64 Kbytes
0000h - 00BFFFh (48K)
0000h -00FFFFh (64K)
Code Memory Size
Panel 1
Panel 2
Panel 3
Panel 4
Panel 5
Panel 6
Panel 7
Panel 8
(Bytes)
DS39606E-page 5
000000h
0007FFh
001FFFh
003FFFh
005FFFh
007FFFh
009FFFh
00BFFFh
00DFFFh
00FFFFh
01FFFFh