RFPIC12F675KT-I/SS Microchip Technology, RFPIC12F675KT-I/SS Datasheet - Page 46
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RFPIC12F675KT-I/SS
Manufacturer Part Number
RFPIC12F675KT-I/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC®r
Specifications of RFPIC12F675KT-I/SS
Rohs Compliant
YES
Frequency
850MHz ~ 950MHz
Applications
RKE, Security Systems
Modulation Or Protocol
ASK, FSK
Data Rate - Maximum
40 kbps
Power - Output
10dBm
Current - Transmitting
14mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Memory Size
1024 x 14 words Flash, 128 x 8 Byte EEPROM, 64 x 8 Byte SRAM
Voltage - Supply
2V ~ 5.5V
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Processor Series
RFPIC12F
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
1024 B
Data Ram Size
64 B
Interface Type
USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ICE2000, DV164102, AC164101, AC164103
Minimum Operating Temperature
- 40 C
On-chip Adc
4 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164104 - MODULE RCVR RFPIC 315MHZAC164102 - MODULE TRANSMITTER RFPIC 315MHZAC124002 - MOD SKT PROMATEII 18SOIC/20SSOP
Features
-
Lead Free Status / Rohs Status
Details
Other names
RFPIC12F675KT-ISS
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
RFPIC12F675KT-I/SS
Manufacturer:
BOURNS
Quantity:
12 000
rfPIC12F675
7.3
The A/D converter module can operate during SLEEP.
This requires the A/D clock source to be set to the
internal RC oscillator. When the RC clock source is
selected, the A/D waits one instruction before starting
the conversion. This allows the SLEEP instruction to be
executed, thus eliminating much of the switching noise
from the conversion. When the conversion is complete,
the GO/DONE bit is cleared, and the result is loaded
into the ADRESH:ADRESL registers. If the A/D
interrupt is enabled, the device awakens from SLEEP.
If the A/D interrupt is not enabled, the A/D module is
turned off, although the ADON bit remains set.
TABLE 7-2:
DS70091A-page 44
05h
0Bh, 8Bh INTCON
0Ch
1Eh
1Fh
85h
8Ch
9Eh
9Fh
Legend:
Address
A/D Operation During SLEEP
x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used for A/D converter module.
GPIO
PIR1
ADRESH Most Significant 8 bits of the Left Shifted A/D result or 2 bits of the Right Shifted Result
ADCON0
TRISIO
PIE1
ADRESL
ANSEL
Name
SUMMARY OF A/D REGISTERS
Least Significant 2 bits of the Left Shifted A/D Result or 8 bits of the Right Shifted Result
ADFM
Bit 7
EEIF
EEIE
GIE
—
—
—
ADCS2
VCFG
PEIE
ADIF
ADIE
Bit 6
—
—
TRISIO5
ADCS1
GPIO5
Bit 5
T0IE
—
—
—
TRISIO4
ADCS0
GPIO4
INTE
Preliminary
Bit 4
—
—
—
TRISIO3
GPIO3
CHS1
ANS3
CMIF
CMIE
GPIE
Bit 3
When the A/D clock source is something other than
RC, a SLEEP instruction causes the present conversion
to be aborted, and the A/D module is turned off. The
ADON bit remains set.
7.4
A device RESET forces all registers to their RESET
state. Thus the A/D module is turned off and any
pending conversion is aborted. The ADRESH:ADRESL
registers are unchanged.
TRISIO2 TRISIO1 TRISIO0
GPIO2
CHS0
ANS2
Bit 2
T0IF
—
—
Effects of RESET
GPIO1
ANS1
Bit 1
INTF
GO
—
—
TMR1IF
TMR1IE
GPIO0
ADON
ANS0
2003 Microchip Technology Inc.
GPIF
Bit 0
--xx xxxx --uu uuuu
0000 0000 0000 000u
00-- 0--0 00-- 0--0
xxxx xxxx uuuu uuuu
00-- 0000 00-- 0000
--11 1111 --11 1111
00-- 0--0 00-- 0--0
xxxx xxxx uuuu uuuu
-000 1111 -000 1111
Value on:
POR,
BOD
Value on
RESETS
all other