S29AL008D70TFI020 Spansion Inc., S29AL008D70TFI020 Datasheet - Page 12

• Manufacturer Part Number: S29AL008D70TFI020
• Description: Flash Memory IC
• Manufacturer: Spansion Inc.

Specifications of S29AL008D70TFI020

• Memory Size: 8Mbit
• Memory Configuration: 1M X 8 / 512K X 16
• Ic Interface Type: Parallel
• Access Time: 70ns
• Memory Case Style: TSOP
• No. Of Pins: 48
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12
Writing Commands/Command Sequences
Program and Erase Operation Status
Standby Mode
The internal state machine is set for reading array data upon device power-up,
or after a hardware reset. This ensures that no spurious alteration of the memory
content occurs during the power transition. No command is necessary in this
mode to obtain array data. Standard microprocessor read cycles that assert valid
addresses on the device address inputs produce valid data on the device data
outputs. The device remains enabled for read access until the command register
contents are altered.
See
for timing specifications and to
in the DC Characteristics table represents the active current specification for
reading array data.
To write a command or command sequence (which includes programming data
to the device and erasing sectors of memory), the system must drive WE# and
CE# to V
For program operations, the BYTE# pin determines whether the device accepts
program data in bytes or words. Refer to
for more information.
The device features an Unlock Bypass mode to facilitate faster programming.
Once the device enters the Unlock Bypass mode, only two write cycles are re-
quired to program a word or byte, instead of four. The
Command Sequence, on page 20
device using both standard and Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sectors, or the entire device.
Table 2, on page 14
sector occupies. A sector address consists of the address bits required to uniquely
select a sector. The
a sector or the entire chip, or suspending/resuming the erase operation.
After the system writes the autoselect command sequence, the device enters the
autoselect mode. The system can then read autoselect codes from the internal
register (which is separate from the memory array) on DQ7–DQ0. Standard read
cycle timings apply in this mode. Refer to the
I
the write mode. The
tables and timing diagrams for write operations.
During an erase or program operation, the system may check the status of the
operation by reading the status bits on DQ7–DQ0. Standard read cycle timings
and I
for more information, and to
When the system is not reading or writing to the device, it can place the device
in the standby mode. In this mode, current consumption is greatly reduced, and
the outputs are placed in the high impedance state, independent of the OE#
input.
Autoselect Command Sequence, on page 20
CC2
in the DC Characteristics table represents the active current specification for
Reading Array Data, on page 19
CC
read specifications apply. Refer to
IL
, and OE# to V
and
Command Definitions, on page 19
AC Characteristics, on page 38
Table 3, on page 15
IH
.
AC Characteristics, on page 38
D a t a
Figure 13, on page 38
contains details on programming data to the
S29AL008D
for more information. Refer to the AC table
S h e e t
Word/Byte Configuration, on page 11
Write Operation Status, on page 27
indicate the address space that each
for more information.
Autoselect Mode, on page 15
contains timing specification
for the timing diagram. I
contains details on erasing
Word/Byte Program
for timing diagrams.
S29AL008D_00A3 June 16, 2005
and
CC1