S29GL032A10TFIR40 Spansion Inc., S29GL032A10TFIR40 Datasheet - Page 21

• Manufacturer Part Number: S29GL032A10TFIR40
• Description: Flash - NOR IC
• Manufacturer: Spansion Inc.

Specifications of S29GL032A10TFIR40

• Memory Size: 32Mbit
• Memory Configuration: 64K X 8
• Ic Interface Type: Parallel
• Access Time: 100ns
• Memory Case Style: TSOP
• No. Of Pins: 48
• Operating Temperature Range: -40°C To +85°C
• Page/burst Read Access: 25ns

Device Bus Operations
Legend: L = Logic Low = V
Address, A
Notes:
1. Addresses are Amax:A0 in word mode; Amax:A-1 in byte mode. Sector addresses are Amax:A15 in both modes.
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the
3. If WP# = V
4. D
January 28, 2005 S29GLxxxA_00_A2
Read
Write (Program/Erase)
Accelerated Program
Standby
Output Disable
Reset
Sector Group Protect
(Note 2)
Sector Group
Unprotect
(Note 2)
Temporary Sector
Group Unprotect
“Sector Group Protection and Unprotection” section.
are protected (for boot sector devices). If WP# = V
protected or unprotected as determined by the method described in “Sector Group Protection and Unprotection”.
All sectors are unprotected when shipped from the factory (The Secured Silicon Sector may be factory protected
depending on version ordered.)
IN
Operation
or D
IN
OUT
= Address In, D
IL
as required by command sequence, data polling, or sector protect algorithm (see
, the first or last sector remains protected (for uniform sector devices), and the two outer boot sectors
This section describes the requirements and use of the device bus operations,
which are initiated through the internal command register. The command register
itself does not occupy any addressable memory location. The register is a latch
used to store the commands, along with the address and data information
needed to execute the command. The contents of the register serve as inputs to
the internal state machine. The state machine outputs dictate the function of the
device.
require, and the resulting output. The following subsections describe each of
these operations in further detail.
V
0.3 V
CE#
Table 3
CC
X
X
L
L
L
L
L
L
IL
±
A d v a n c e
, H = Logic High = V
IN
OE# WE# RESET#
= Data In, D
H
H
X
H
X
H
H
X
L
lists the device bus operations, the inputs and control levels they
H
X
H
X
X
L
L
L
L
Table 3. Device Bus Operations
S29GLxxxA MirrorBit™ Flash Family
OUT
V
0.3 V
I n f o r m a t i o n
V
V
V
CC
H
H
H
H
L
IH
ID
ID
ID
= Data Out
±
, V
ID
(Note 3)
(Note 3)
IH
= 11.5–12.5 V, V
WP#
, the first or last sector, or the two outer boot sectors will be
X
X
X
X
H
H
H
ACC
V
X
X
H
X
X
X
X
X
HH
A3=L, A2=L,
A3=L, A2=L,
A1=H, A0=L
A1=H, A0=L
HH
Addresses
SA, A6 =L,
SA, A6=H,
(Note 1)
= 11.5–12.5 V, X = Don’t Care, SA = Sector
A
A
A
A
X
X
X
IN
IN
IN
IN
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
High-Z
High-Z
High-Z
DQ0–
D
DQ7
OUT
BYTE#
High-Z
High-Z
High-Z
= V
(Note
(Note
(Note
D
Figure
4)
4)
4)
OUT
X
X
IH
DQ8–DQ15
7).
DQ15 = A-1
DQ8–DQ14
= High-Z,
BYTE#
High-Z
High-Z
High-Z
High-Z
= V
X
X
IL
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