MCZ33905BS5EK Freescale Semiconductor, MCZ33905BS5EK Datasheet - Page 76
MCZ33905BS5EK
Manufacturer Part Number
MCZ33905BS5EK
Description
IC SBC CAN HS 5.0V 32SOIC
Manufacturer
Freescale Semiconductor
Datasheet
1.MCZ33904A5EKR2.pdf
(98 pages)
Specifications of MCZ33905BS5EK
Applications
System Basis Chip
Interface
CAN, LIN
Voltage - Supply
5.5 V ~ 27 V
Package / Case
*
Mounting Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCZ33905BS5EK
Manufacturer:
FREESCALE
Quantity:
20 000
76
33903/4/5
SERIAL PERIPHERAL INTERFACE
DETAIL OF CONTROL BITS AND REGISTER MAPPING
Table 34. INT Register, INT
Notes
29.
30.
[b_15 b_14] 10_010 [P/N]
MOSI First byte [15-8]
Bits
Condition for default
b7
b6
b5
b4
b3
b2
b0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
If VDD under-voltage is set to 70% of VDD, see bits b6 and b5 in Table 15 on page 63.
Bit 2 is used in conjunction with bit 6. Both bit 6 and bit 2 must be set to 1 to activate the MCU INT request.
01 10_ 010P
Default state
CAN failure - control bit for CAN failure INT (CANH/L to GND, VDD or VSUP, CAN over-current, Driver Over Temp, TxD-PD,
RxD-PR, RX2HIGH, and CANBUS Dominate clamp)
INT disable
INT enable.
MCU req - Control bit to request an INT. INT will occur once when the bit is enable
INT disable
INT enable.
LIN2 fail - Control bit to enable INT in case of failure on LIN2 interface
INT disable
INT enable.
LIN1 fail - Control bit to enable INT in case of failure on LIN1 interface
INT disable
INT enable.
I/O - Bit to control I/O interruption: I/O failure
INT disable
INT enable.
SAFE - Bit to enable INT in case of: Vaux over-voltage, VDD over-voltage, VDD Temp pre warning, VDD under-voltage
SAFE resistor mismatch, RST terminal short to VDD, MCU request INT.
INT disable
INT enable.
V
V
INT disable
INT enable.
MON
SOV
, V
- enable interruption by voltage monitoring of one of the voltage regulator: V
SENSELOW
CAN failure
bit 7
, 5V-CAN low or thermal shutdown, V
0
MCU req
bit 6
0
LIN2 fail
bit 5
0
AUX
Description
MOSI Second Byte, bits 7-0
LIN1fail
bit 4
0
low or V
POR
AUX
(30)
bit 3
over-current
I/O
0
AUX
Analog Integrated Circuit Device Data
, 5 V-CAN, V
SAFE
bit 2
0
DD
Freescale Semiconductor
(I
DD
bit 1
0
-
Over-current, V
Vmon
bit 0
0
(29)
SUV
,
,